2011-12-27 07:18:36 +00:00
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/*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Common Header for EXYNOS machines
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
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#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
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2013-03-09 08:03:05 +00:00
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#include <linux/of.h>
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2013-04-10 09:35:29 +00:00
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void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
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2013-03-09 08:03:05 +00:00
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void exynos_init_time(void);
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2013-03-09 08:03:33 +00:00
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extern unsigned long xxti_f, xusbxti_f;
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2012-02-11 12:27:08 +00:00
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2011-09-08 12:15:22 +00:00
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struct map_desc;
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2011-12-27 07:18:36 +00:00
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void exynos_init_io(struct map_desc *mach_desc, int size);
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2012-02-11 12:27:08 +00:00
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void exynos4_restart(char mode, const char *cmd);
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2012-02-11 13:15:45 +00:00
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void exynos5_restart(char mode, const char *cmd);
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2012-04-26 02:35:40 +00:00
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void exynos_init_late(void);
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2013-03-09 08:03:05 +00:00
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/* ToDo: remove these after migrating legacy exynos4 platforms to dt */
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2013-04-10 09:31:44 +00:00
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void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom);
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2013-03-09 08:03:05 +00:00
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void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
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2012-12-11 04:58:43 +00:00
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void exynos_firmware_init(void);
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2013-05-24 21:27:29 +00:00
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void exynos_set_timer_source(u8 channels);
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2012-04-26 02:35:40 +00:00
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#ifdef CONFIG_PM_GENERIC_DOMAINS
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int exynos_pm_late_initcall(void);
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#else
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2012-12-15 17:43:47 +00:00
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static inline int exynos_pm_late_initcall(void) { return 0; }
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2012-04-26 02:35:40 +00:00
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#endif
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2011-12-27 07:18:36 +00:00
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2012-03-09 22:19:10 +00:00
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#ifdef CONFIG_ARCH_EXYNOS4
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2011-12-27 07:18:36 +00:00
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void exynos4_register_clocks(void);
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void exynos4_setup_clocks(void);
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2012-03-09 22:19:10 +00:00
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#else
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#define exynos4_register_clocks()
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#define exynos4_setup_clocks()
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#endif
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2012-02-11 13:15:45 +00:00
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#ifdef CONFIG_ARCH_EXYNOS5
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void exynos5_register_clocks(void);
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void exynos5_setup_clocks(void);
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#else
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#define exynos5_register_clocks()
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#define exynos5_setup_clocks()
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#endif
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2012-02-11 12:27:08 +00:00
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#ifdef CONFIG_CPU_EXYNOS4210
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void exynos4210_register_clocks(void);
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2012-01-03 10:56:53 +00:00
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2012-02-11 12:27:08 +00:00
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#else
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#define exynos4210_register_clocks()
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#endif
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2011-12-27 07:18:36 +00:00
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2012-02-11 12:27:08 +00:00
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#ifdef CONFIG_SOC_EXYNOS4212
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void exynos4212_register_clocks(void);
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2011-12-27 07:18:36 +00:00
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#else
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2012-02-11 12:27:08 +00:00
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#define exynos4212_register_clocks()
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2011-12-27 07:18:36 +00:00
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#endif
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2013-02-12 22:04:52 +00:00
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struct device_node;
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2013-04-10 13:17:47 +00:00
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void combiner_init(void __iomem *combiner_base, struct device_node *np,
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2013-04-12 13:27:09 +00:00
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unsigned int max_nr, int irq_base);
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2013-02-12 22:04:52 +00:00
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2011-09-08 12:15:22 +00:00
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extern struct smp_operations exynos_smp_ops;
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extern void exynos_cpu_die(unsigned int cpu);
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2012-12-31 18:06:48 +00:00
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/* PMU(Power Management Unit) support */
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#define PMU_TABLE_END NULL
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enum sys_powerdown {
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SYS_AFTR,
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SYS_LPA,
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SYS_SLEEP,
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NUM_SYS_POWERDOWN,
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};
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extern unsigned long l2x0_regs_phys;
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struct exynos_pmu_conf {
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void __iomem *reg;
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unsigned int val[NUM_SYS_POWERDOWN];
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};
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extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
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extern void s3c_cpu_resume(void);
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2011-12-27 07:18:36 +00:00
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#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
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