2019-05-27 06:55:01 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2009-08-07 15:35:16 +00:00
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/*
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* MPC85xx RDB Board Setup
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*
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2013-11-06 09:08:02 +00:00
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* Copyright 2009,2012-2013 Freescale Semiconductor Inc.
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2009-08-07 15:35:16 +00:00
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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2015-09-20 04:29:53 +00:00
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#include <linux/fsl/guts.h>
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2009-08-07 15:35:16 +00:00
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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2015-11-30 02:48:57 +00:00
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#include <soc/fsl/qe/qe.h>
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2009-08-07 15:35:16 +00:00
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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2011-12-02 06:27:58 +00:00
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#include "smp.h"
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2009-08-07 15:35:16 +00:00
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2011-11-17 17:56:16 +00:00
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#include "mpc85xx.h"
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2009-08-07 15:35:16 +00:00
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
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#else
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#define DBG(fmt, args...)
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#endif
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void __init mpc85xx_rdb_pic_init(void)
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{
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struct mpic *mpic;
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2016-07-05 05:04:04 +00:00
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if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
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2011-12-22 10:19:14 +00:00
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mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
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2011-12-22 10:19:12 +00:00
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MPIC_BIG_ENDIAN |
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2011-07-12 07:49:43 +00:00
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MPIC_SINGLE_DEST_CPU,
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powerpc/85xx: Create dts for each core in CAMP mode for P2020RDB
This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-19 17:13:56 +00:00
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0, 256, " OpenPIC ");
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} else {
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2011-12-02 06:28:02 +00:00
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mpic = mpic_alloc(NULL, 0,
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2011-12-22 10:19:12 +00:00
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MPIC_BIG_ENDIAN |
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2009-08-07 15:35:16 +00:00
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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powerpc/85xx: Create dts for each core in CAMP mode for P2020RDB
This patch creates the dts files for each core and splits the devices
between the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto,
global-util, pci0,
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupts from other core by using "protected-sources" of mpic.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-19 17:13:56 +00:00
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}
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2009-08-07 15:35:16 +00:00
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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/*
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* Setup the architecture
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*/
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static void __init mpc85xx_rdb_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
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mpc85xx_smp_init();
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2012-02-22 05:44:06 +00:00
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2012-08-28 07:44:08 +00:00
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fsl_pci_assign_primary();
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2012-02-22 05:44:06 +00:00
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#ifdef CONFIG_QUICC_ENGINE
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2014-03-06 01:38:12 +00:00
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mpc85xx_qe_par_io_init();
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2012-02-22 05:44:06 +00:00
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#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
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if (machine_is(p1025_rdb)) {
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2014-02-20 20:48:16 +00:00
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struct device_node *np;
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2012-02-22 05:44:06 +00:00
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2012-03-19 16:06:39 +00:00
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struct ccsr_guts __iomem *guts;
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2012-02-22 05:44:06 +00:00
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np = of_find_node_by_name(NULL, "global-utilities");
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if (np) {
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guts = of_iomap(np, 0);
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if (!guts) {
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pr_err("mpc85xx-rdb: could not map global utilities register\n");
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} else {
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/* P1025 has pins muxed for QE and other functions. To
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* enable QE UEC mode, we need to set bit QE0 for UCC1
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* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
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* and QE12 for QE MII management singals in PMUXCR
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* register.
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*/
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setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
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MPC85xx_PMUXCR_QE(3) |
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MPC85xx_PMUXCR_QE(9) |
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MPC85xx_PMUXCR_QE(12));
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iounmap(guts);
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}
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of_node_put(np);
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}
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}
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#endif
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#endif /* CONFIG_QUICC_ENGINE */
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2009-08-07 15:35:16 +00:00
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printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
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}
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2012-08-28 07:44:08 +00:00
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machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
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machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
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2013-07-01 04:12:22 +00:00
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machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
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2012-08-28 07:44:08 +00:00
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machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
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2009-08-07 15:35:16 +00:00
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p2020_rdb_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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if (of_machine_is_compatible("fsl,P2020RDB"))
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2009-08-07 15:35:16 +00:00
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return 1;
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return 0;
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}
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2009-09-25 04:20:28 +00:00
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static int __init p1020_rdb_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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if (of_machine_is_compatible("fsl,P1020RDB"))
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2009-09-25 04:20:28 +00:00
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return 1;
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return 0;
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}
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2012-02-10 06:48:15 +00:00
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static int __init p1020_rdb_pc_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1020RDB-PC");
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2012-02-10 06:48:15 +00:00
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}
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2013-07-01 04:12:22 +00:00
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static int __init p1020_rdb_pd_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1020RDB-PD");
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2013-07-01 04:12:22 +00:00
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}
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2012-01-17 08:01:30 +00:00
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static int __init p1021_rdb_pc_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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if (of_machine_is_compatible("fsl,P1021RDB-PC"))
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2012-01-17 08:01:30 +00:00
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return 1;
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return 0;
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}
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2011-12-28 03:41:47 +00:00
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static int __init p2020_rdb_pc_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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if (of_machine_is_compatible("fsl,P2020RDB-PC"))
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2011-12-28 03:41:47 +00:00
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return 1;
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return 0;
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}
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2012-02-13 22:06:22 +00:00
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static int __init p1025_rdb_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1025RDB");
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2012-02-13 22:06:22 +00:00
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}
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2012-03-14 09:08:27 +00:00
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static int __init p1020_mbg_pc_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1020MBG-PC");
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2012-03-14 09:08:27 +00:00
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}
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2012-03-14 09:08:28 +00:00
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static int __init p1020_utm_pc_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1020UTM-PC");
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2012-03-14 09:08:28 +00:00
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}
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2012-05-24 09:08:28 +00:00
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static int __init p1024_rdb_probe(void)
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{
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2016-07-05 05:04:05 +00:00
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return of_machine_is_compatible("fsl,P1024RDB");
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2012-05-24 09:08:28 +00:00
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}
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2009-08-07 15:35:16 +00:00
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define_machine(p2020_rdb) {
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.name = "P2020 RDB",
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.probe = p2020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
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.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
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2009-08-07 15:35:16 +00:00
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#endif
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.get_irq = mpic_get_irq,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2009-09-25 04:20:28 +00:00
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define_machine(p1020_rdb) {
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.name = "P1020 RDB",
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.probe = p1020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
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.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
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2009-09-25 04:20:28 +00:00
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#endif
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.get_irq = mpic_get_irq,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2012-01-17 08:01:30 +00:00
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define_machine(p1021_rdb_pc) {
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.name = "P1021 RDB-PC",
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.probe = p1021_rdb_pc_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
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.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
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2012-01-17 08:01:30 +00:00
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#endif
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.get_irq = mpic_get_irq,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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2011-12-28 03:41:47 +00:00
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|
|
|
|
|
|
define_machine(p2020_rdb_pc) {
|
|
|
|
|
.name = "P2020RDB-PC",
|
|
|
|
|
.probe = p2020_rdb_pc_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2011-12-28 03:41:47 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
2012-02-13 22:06:22 +00:00
|
|
|
|
|
|
|
|
define_machine(p1025_rdb) {
|
|
|
|
|
.name = "P1025 RDB",
|
|
|
|
|
.probe = p1025_rdb_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2012-02-13 22:06:22 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
2012-03-14 09:08:27 +00:00
|
|
|
|
|
|
|
|
define_machine(p1020_mbg_pc) {
|
|
|
|
|
.name = "P1020 MBG-PC",
|
|
|
|
|
.probe = p1020_mbg_pc_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2012-03-14 09:08:27 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
2012-03-14 09:08:28 +00:00
|
|
|
|
|
|
|
|
define_machine(p1020_utm_pc) {
|
|
|
|
|
.name = "P1020 UTM-PC",
|
|
|
|
|
.probe = p1020_utm_pc_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2012-03-14 09:08:28 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
2012-02-10 06:48:15 +00:00
|
|
|
|
|
|
|
|
define_machine(p1020_rdb_pc) {
|
|
|
|
|
.name = "P1020RDB-PC",
|
|
|
|
|
.probe = p1020_rdb_pc_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2012-02-10 06:48:15 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
2012-05-24 09:08:28 +00:00
|
|
|
|
2013-07-01 04:12:22 +00:00
|
|
|
define_machine(p1020_rdb_pd) {
|
|
|
|
|
.name = "P1020RDB-PD",
|
|
|
|
|
.probe = p1020_rdb_pd_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2013-07-01 04:12:22 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-24 09:08:28 +00:00
|
|
|
define_machine(p1024_rdb) {
|
|
|
|
|
.name = "P1024 RDB",
|
|
|
|
|
.probe = p1024_rdb_probe,
|
|
|
|
|
.setup_arch = mpc85xx_rdb_setup_arch,
|
|
|
|
|
.init_IRQ = mpc85xx_rdb_pic_init,
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2012-05-24 09:08:28 +00:00
|
|
|
#endif
|
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
|
.progress = udbg_progress,
|
|
|
|
|
};
|
