2019-05-27 06:55:01 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
2011-06-02 20:28:08 +00:00
|
|
|
/*
|
|
|
|
* P1010RDB Board Setup
|
|
|
|
*
|
|
|
|
* Copyright 2011 Freescale Semiconductor Inc.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/stddef.h>
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/pci.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <linux/interrupt.h>
|
|
|
|
#include <linux/of_platform.h>
|
|
|
|
|
|
|
|
#include <asm/time.h>
|
|
|
|
#include <asm/machdep.h>
|
|
|
|
#include <asm/pci-bridge.h>
|
|
|
|
#include <mm/mmu_decl.h>
|
|
|
|
#include <asm/udbg.h>
|
|
|
|
#include <asm/mpic.h>
|
|
|
|
|
|
|
|
#include <sysdev/fsl_soc.h>
|
|
|
|
#include <sysdev/fsl_pci.h>
|
|
|
|
|
2011-11-24 07:00:10 +00:00
|
|
|
#include "mpc85xx.h"
|
|
|
|
|
2011-06-02 20:28:08 +00:00
|
|
|
void __init p1010_rdb_pic_init(void)
|
|
|
|
{
|
2011-12-22 10:19:14 +00:00
|
|
|
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
2011-12-22 10:19:12 +00:00
|
|
|
MPIC_SINGLE_DEST_CPU,
|
2011-06-02 20:28:08 +00:00
|
|
|
0, 256, " OpenPIC ");
|
|
|
|
|
|
|
|
BUG_ON(mpic == NULL);
|
|
|
|
|
|
|
|
mpic_init(mpic);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Setup the architecture
|
|
|
|
*/
|
|
|
|
static void __init p1010_rdb_setup_arch(void)
|
|
|
|
{
|
|
|
|
if (ppc_md.progress)
|
|
|
|
ppc_md.progress("p1010_rdb_setup_arch()", 0);
|
|
|
|
|
2012-08-28 07:44:08 +00:00
|
|
|
fsl_pci_assign_primary();
|
2011-06-02 20:28:08 +00:00
|
|
|
|
|
|
|
printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
|
|
|
|
}
|
|
|
|
|
2012-08-28 07:44:08 +00:00
|
|
|
machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices);
|
2011-06-02 20:28:08 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Called very early, device-tree isn't unflattened
|
|
|
|
*/
|
|
|
|
static int __init p1010_rdb_probe(void)
|
|
|
|
{
|
2016-07-05 05:04:05 +00:00
|
|
|
if (of_machine_is_compatible("fsl,P1010RDB"))
|
2011-06-02 20:28:08 +00:00
|
|
|
return 1;
|
2016-07-05 05:04:05 +00:00
|
|
|
if (of_machine_is_compatible("fsl,P1010RDB-PB"))
|
2013-10-14 06:46:13 +00:00
|
|
|
return 1;
|
2011-06-02 20:28:08 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
define_machine(p1010_rdb) {
|
|
|
|
.name = "P1010 RDB",
|
|
|
|
.probe = p1010_rdb_probe,
|
|
|
|
.setup_arch = p1010_rdb_setup_arch,
|
|
|
|
.init_IRQ = p1010_rdb_pic_init,
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2014-03-20 03:19:37 +00:00
|
|
|
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
|
2011-06-02 20:28:08 +00:00
|
|
|
#endif
|
|
|
|
.get_irq = mpic_get_irq,
|
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
|
.progress = udbg_progress,
|
|
|
|
};
|