2019-06-04 08:11:33 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2012-12-18 00:02:44 +00:00
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/*
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* Copyright (C) 2012 Avionic Design GmbH
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*/
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#include <linux/bcd.h>
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2021-10-18 15:36:50 +00:00
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#include <linux/bitfield.h>
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2012-12-18 00:02:44 +00:00
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#include <linux/i2c.h>
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#include <linux/module.h>
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2021-10-18 15:36:46 +00:00
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#include <linux/regmap.h>
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2012-12-18 00:02:44 +00:00
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#include <linux/rtc.h>
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#include <linux/of.h>
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2021-04-18 00:20:22 +00:00
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#include <linux/pm_wakeirq.h>
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2012-12-18 00:02:44 +00:00
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2021-07-10 21:14:31 +00:00
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#define PCF8523_REG_CONTROL1 0x00
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#define PCF8523_CONTROL1_CAP_SEL BIT(7)
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#define PCF8523_CONTROL1_STOP BIT(5)
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#define PCF8523_CONTROL1_AIE BIT(1)
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#define PCF8523_REG_CONTROL2 0x01
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#define PCF8523_CONTROL2_AF BIT(3)
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#define PCF8523_REG_CONTROL3 0x02
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2021-10-18 15:36:50 +00:00
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#define PCF8523_CONTROL3_PM GENMASK(7,5)
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#define PCF8523_PM_STANDBY 0x7
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2021-07-10 21:14:31 +00:00
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#define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */
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2021-10-15 19:24:00 +00:00
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#define PCF8523_CONTROL3_BSF BIT(3)
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2021-07-10 21:14:31 +00:00
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#define PCF8523_REG_SECONDS 0x03
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#define PCF8523_SECONDS_OS BIT(7)
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#define PCF8523_REG_MINUTES 0x04
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#define PCF8523_REG_HOURS 0x05
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#define PCF8523_REG_DAYS 0x06
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#define PCF8523_REG_WEEKDAYS 0x07
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#define PCF8523_REG_MONTHS 0x08
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#define PCF8523_REG_YEARS 0x09
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#define PCF8523_REG_MINUTE_ALARM 0x0a
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#define PCF8523_REG_HOUR_ALARM 0x0b
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#define PCF8523_REG_DAY_ALARM 0x0c
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#define PCF8523_REG_WEEKDAY_ALARM 0x0d
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2021-04-18 00:20:22 +00:00
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#define ALARM_DIS BIT(7)
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2021-07-10 21:14:31 +00:00
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#define PCF8523_REG_OFFSET 0x0e
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#define PCF8523_OFFSET_MODE BIT(7)
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2017-09-29 10:23:36 +00:00
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2021-07-10 21:14:31 +00:00
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#define PCF8523_TMR_CLKOUT_CTRL 0x0f
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2021-04-18 00:20:22 +00:00
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struct pcf8523 {
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struct rtc_device *rtc;
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2021-10-18 15:36:46 +00:00
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struct regmap *regmap;
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2021-04-18 00:20:22 +00:00
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};
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2021-10-18 15:36:46 +00:00
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static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node)
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2012-12-18 00:02:44 +00:00
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{
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2021-10-18 15:36:46 +00:00
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u32 load, value = 0;
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2012-12-18 00:02:44 +00:00
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2019-01-19 09:00:30 +00:00
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load = 12500;
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2021-10-18 15:36:46 +00:00
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of_property_read_u32(node, "quartz-load-femtofarads", &load);
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2019-01-19 09:00:30 +00:00
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switch (load) {
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default:
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2021-10-18 15:36:46 +00:00
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dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
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2019-01-19 09:00:30 +00:00
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load);
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2020-08-23 22:36:59 +00:00
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fallthrough;
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2019-01-19 09:00:30 +00:00
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case 12500:
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2021-07-10 21:14:31 +00:00
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value |= PCF8523_CONTROL1_CAP_SEL;
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2019-01-19 09:00:30 +00:00
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break;
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case 7000:
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break;
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}
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2012-12-18 00:02:44 +00:00
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2021-10-18 15:36:46 +00:00
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return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
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PCF8523_CONTROL1_CAP_SEL, value);
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2012-12-18 00:02:44 +00:00
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}
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2021-04-18 00:20:22 +00:00
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static irqreturn_t pcf8523_irq(int irq, void *dev_id)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_id;
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u32 value;
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2021-04-18 00:20:22 +00:00
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int err;
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2021-10-18 15:36:46 +00:00
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err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return IRQ_HANDLED;
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2021-07-10 21:14:31 +00:00
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if (value & PCF8523_CONTROL2_AF) {
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value &= ~PCF8523_CONTROL2_AF;
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2021-10-18 15:36:46 +00:00
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regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value);
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2021-04-18 00:20:22 +00:00
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rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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2012-12-18 00:02:44 +00:00
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static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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u8 regs[7];
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2012-12-18 00:02:44 +00:00
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int err;
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2021-10-18 15:36:46 +00:00
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err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
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sizeof(regs));
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2012-12-18 00:02:44 +00:00
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if (err < 0)
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return err;
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2021-07-10 21:14:31 +00:00
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if (regs[0] & PCF8523_SECONDS_OS)
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2016-03-03 08:55:47 +00:00
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return -EINVAL;
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2012-12-18 00:02:44 +00:00
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tm->tm_sec = bcd2bin(regs[0] & 0x7f);
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tm->tm_min = bcd2bin(regs[1] & 0x7f);
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tm->tm_hour = bcd2bin(regs[2] & 0x3f);
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tm->tm_mday = bcd2bin(regs[3] & 0x3f);
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tm->tm_wday = regs[4] & 0x7;
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2014-05-06 19:49:58 +00:00
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tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
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2012-12-18 00:02:44 +00:00
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tm->tm_year = bcd2bin(regs[6]) + 100;
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2018-02-19 15:23:56 +00:00
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return 0;
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2012-12-18 00:02:44 +00:00
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}
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static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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u8 regs[7];
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2012-12-18 00:02:44 +00:00
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int err;
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2021-10-18 15:36:46 +00:00
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err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
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PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP);
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2012-12-18 00:02:44 +00:00
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if (err < 0)
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return err;
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2021-07-10 21:14:31 +00:00
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/* This will purposely overwrite PCF8523_SECONDS_OS */
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2021-10-18 15:36:46 +00:00
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regs[0] = bin2bcd(tm->tm_sec);
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regs[1] = bin2bcd(tm->tm_min);
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regs[2] = bin2bcd(tm->tm_hour);
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regs[3] = bin2bcd(tm->tm_mday);
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regs[4] = tm->tm_wday;
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regs[5] = bin2bcd(tm->tm_mon + 1);
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regs[6] = bin2bcd(tm->tm_year - 100);
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err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
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sizeof(regs));
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2012-12-18 00:02:44 +00:00
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if (err < 0) {
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/*
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* If the time cannot be set, restart the RTC anyway. Note
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* that errors are ignored if the RTC cannot be started so
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* that we have a chance to propagate the original error.
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*/
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2021-10-18 15:36:46 +00:00
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regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
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PCF8523_CONTROL1_STOP, 0);
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2012-12-18 00:02:44 +00:00
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return err;
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}
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2021-10-18 15:36:46 +00:00
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return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
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PCF8523_CONTROL1_STOP, 0);
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2012-12-18 00:02:44 +00:00
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}
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2021-04-18 00:20:22 +00:00
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static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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u8 regs[4];
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u32 value;
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2021-04-18 00:20:22 +00:00
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int err;
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2021-10-18 15:36:46 +00:00
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err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
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sizeof(regs));
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return err;
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tm->time.tm_sec = 0;
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tm->time.tm_min = bcd2bin(regs[0] & 0x7F);
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tm->time.tm_hour = bcd2bin(regs[1] & 0x3F);
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tm->time.tm_mday = bcd2bin(regs[2] & 0x3F);
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tm->time.tm_wday = bcd2bin(regs[3] & 0x7);
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2021-10-18 15:36:46 +00:00
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err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value);
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return err;
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2021-07-10 21:14:31 +00:00
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tm->enabled = !!(value & PCF8523_CONTROL1_AIE);
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2021-04-18 00:20:22 +00:00
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2021-10-18 15:36:46 +00:00
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err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return err;
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2021-07-10 21:14:31 +00:00
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tm->pending = !!(value & PCF8523_CONTROL2_AF);
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2021-04-18 00:20:22 +00:00
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return 0;
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}
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static int pcf8523_irq_enable(struct device *dev, unsigned int enabled)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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2021-04-18 00:20:22 +00:00
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2021-10-18 15:36:46 +00:00
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return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
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PCF8523_CONTROL1_AIE, enabled ?
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PCF8523_CONTROL1_AIE : 0);
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2021-04-18 00:20:22 +00:00
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}
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static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
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{
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2021-10-18 15:36:46 +00:00
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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2021-04-18 00:20:22 +00:00
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u8 regs[5];
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int err;
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err = pcf8523_irq_enable(dev, 0);
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if (err)
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return err;
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2021-10-18 15:36:46 +00:00
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err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0);
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return err;
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/* The alarm has no seconds, round up to nearest minute */
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if (tm->time.tm_sec) {
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time64_t alarm_time = rtc_tm_to_time64(&tm->time);
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alarm_time += 60 - tm->time.tm_sec;
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rtc_time64_to_tm(alarm_time, &tm->time);
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}
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2021-10-18 15:36:46 +00:00
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regs[0] = bin2bcd(tm->time.tm_min);
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regs[1] = bin2bcd(tm->time.tm_hour);
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regs[2] = bin2bcd(tm->time.tm_mday);
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regs[3] = ALARM_DIS;
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err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
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sizeof(regs));
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2021-04-18 00:20:22 +00:00
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if (err < 0)
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return err;
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if (tm->enabled)
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return pcf8523_irq_enable(dev, tm->enabled);
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return 0;
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}
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2021-10-18 15:36:50 +00:00
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static int pcf8523_param_get(struct device *dev, struct rtc_param *param)
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{
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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int ret;
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switch(param->param) {
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u32 value;
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case RTC_PARAM_BACKUP_SWITCH_MODE:
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ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
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if (ret < 0)
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return ret;
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value = FIELD_GET(PCF8523_CONTROL3_PM, value);
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switch(value) {
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case 0x0:
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case 0x4:
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param->uvalue = RTC_BSM_LEVEL;
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break;
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case 0x1:
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case 0x5:
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param->uvalue = RTC_BSM_DIRECT;
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break;
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case PCF8523_PM_STANDBY:
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param->uvalue = RTC_BSM_STANDBY;
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break;
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default:
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param->uvalue = RTC_BSM_DISABLED;
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}
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int pcf8523_param_set(struct device *dev, struct rtc_param *param)
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{
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struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
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switch(param->param) {
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u8 mode;
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case RTC_PARAM_BACKUP_SWITCH_MODE:
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switch (param->uvalue) {
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case RTC_BSM_DISABLED:
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mode = 0x2;
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break;
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case RTC_BSM_DIRECT:
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mode = 0x1;
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|
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|
break;
|
|
|
|
case RTC_BSM_LEVEL:
|
|
|
|
mode = 0x0;
|
|
|
|
break;
|
|
|
|
case RTC_BSM_STANDBY:
|
|
|
|
mode = PCF8523_PM_STANDBY;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3,
|
|
|
|
PCF8523_CONTROL3_PM,
|
|
|
|
FIELD_PREP(PCF8523_CONTROL3_PM, mode));
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-02-22 00:44:27 +00:00
|
|
|
static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
|
|
|
|
unsigned long arg)
|
|
|
|
{
|
2021-10-18 15:36:46 +00:00
|
|
|
struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
|
2021-04-18 00:20:23 +00:00
|
|
|
unsigned int flags = 0;
|
2021-10-18 15:36:46 +00:00
|
|
|
u32 value;
|
2018-12-05 15:00:09 +00:00
|
|
|
int ret;
|
2013-02-22 00:44:27 +00:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case RTC_VL_READ:
|
2021-10-18 15:36:46 +00:00
|
|
|
ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
|
2018-12-05 15:00:09 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2021-10-15 19:24:00 +00:00
|
|
|
|
|
|
|
if (value & PCF8523_CONTROL3_BLF)
|
2021-04-18 00:20:23 +00:00
|
|
|
flags |= RTC_VL_BACKUP_LOW;
|
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
|
2021-04-18 00:20:23 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2021-07-10 21:14:31 +00:00
|
|
|
if (value & PCF8523_SECONDS_OS)
|
2021-04-18 00:20:23 +00:00
|
|
|
flags |= RTC_VL_DATA_INVALID;
|
2013-02-22 00:44:27 +00:00
|
|
|
|
2021-04-18 00:20:23 +00:00
|
|
|
return put_user(flags, (unsigned int __user *)arg);
|
2013-02-22 00:44:27 +00:00
|
|
|
|
|
|
|
default:
|
|
|
|
return -ENOIOCTLCMD;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-09-29 10:23:36 +00:00
|
|
|
static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
|
|
|
|
{
|
2021-10-18 15:36:46 +00:00
|
|
|
struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
|
2017-09-29 10:23:36 +00:00
|
|
|
int err;
|
2021-10-18 15:36:46 +00:00
|
|
|
u32 value;
|
2017-09-29 10:23:36 +00:00
|
|
|
s8 val;
|
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value);
|
2017-09-29 10:23:36 +00:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
/* sign extend the 7-bit offset value */
|
|
|
|
val = value << 1;
|
2021-07-10 21:14:31 +00:00
|
|
|
*offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
|
2017-09-29 10:23:36 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int pcf8523_rtc_set_offset(struct device *dev, long offset)
|
|
|
|
{
|
2021-10-18 15:36:46 +00:00
|
|
|
struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
|
2017-09-29 10:23:36 +00:00
|
|
|
long reg_m0, reg_m1;
|
2021-10-18 15:36:46 +00:00
|
|
|
u32 value;
|
2017-09-29 10:23:36 +00:00
|
|
|
|
|
|
|
reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
|
|
|
|
reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
|
|
|
|
|
|
|
|
if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
|
|
|
|
value = reg_m0 & 0x7f;
|
|
|
|
else
|
2021-07-10 21:14:31 +00:00
|
|
|
value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE;
|
2017-09-29 10:23:36 +00:00
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value);
|
2017-09-29 10:23:36 +00:00
|
|
|
}
|
|
|
|
|
2012-12-18 00:02:44 +00:00
|
|
|
static const struct rtc_class_ops pcf8523_rtc_ops = {
|
|
|
|
.read_time = pcf8523_rtc_read_time,
|
|
|
|
.set_time = pcf8523_rtc_set_time,
|
2021-04-18 00:20:22 +00:00
|
|
|
.read_alarm = pcf8523_rtc_read_alarm,
|
|
|
|
.set_alarm = pcf8523_rtc_set_alarm,
|
|
|
|
.alarm_irq_enable = pcf8523_irq_enable,
|
2013-02-22 00:44:27 +00:00
|
|
|
.ioctl = pcf8523_rtc_ioctl,
|
2017-09-29 10:23:36 +00:00
|
|
|
.read_offset = pcf8523_rtc_read_offset,
|
|
|
|
.set_offset = pcf8523_rtc_set_offset,
|
2021-10-18 15:36:50 +00:00
|
|
|
.param_get = pcf8523_param_get,
|
|
|
|
.param_set = pcf8523_param_set,
|
2012-12-18 00:02:44 +00:00
|
|
|
};
|
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
static const struct regmap_config regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.max_register = 0x13,
|
|
|
|
};
|
|
|
|
|
2012-12-18 00:02:44 +00:00
|
|
|
static int pcf8523_probe(struct i2c_client *client,
|
|
|
|
const struct i2c_device_id *id)
|
|
|
|
{
|
2021-04-18 00:20:22 +00:00
|
|
|
struct pcf8523 *pcf8523;
|
2019-11-23 09:08:38 +00:00
|
|
|
struct rtc_device *rtc;
|
2021-04-18 00:20:22 +00:00
|
|
|
bool wakeup_source = false;
|
2021-10-18 15:36:50 +00:00
|
|
|
u32 value;
|
2012-12-18 00:02:44 +00:00
|
|
|
int err;
|
|
|
|
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2021-04-18 00:20:22 +00:00
|
|
|
pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL);
|
|
|
|
if (!pcf8523)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
pcf8523->regmap = devm_regmap_init_i2c(client, ®map_config);
|
|
|
|
if (IS_ERR(pcf8523->regmap))
|
|
|
|
return PTR_ERR(pcf8523->regmap);
|
|
|
|
|
2021-04-18 00:20:22 +00:00
|
|
|
i2c_set_clientdata(client, pcf8523);
|
|
|
|
|
2021-10-18 15:36:46 +00:00
|
|
|
rtc = devm_rtc_allocate_device(&client->dev);
|
|
|
|
if (IS_ERR(rtc))
|
|
|
|
return PTR_ERR(rtc);
|
|
|
|
pcf8523->rtc = rtc;
|
|
|
|
|
|
|
|
err = pcf8523_load_capacitance(pcf8523, client->dev.of_node);
|
2012-12-18 00:02:44 +00:00
|
|
|
if (err < 0)
|
2019-01-19 09:00:30 +00:00
|
|
|
dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
|
|
|
|
err);
|
2012-12-18 00:02:44 +00:00
|
|
|
|
2021-10-18 15:36:50 +00:00
|
|
|
err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
|
2012-12-18 00:02:44 +00:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
2021-10-18 15:36:50 +00:00
|
|
|
if (value & PCF8523_SECONDS_OS) {
|
|
|
|
err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) {
|
|
|
|
err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3,
|
|
|
|
value & ~PCF8523_CONTROL3_PM);
|
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-11-18 00:27:45 +00:00
|
|
|
rtc->ops = &pcf8523_rtc_ops;
|
2020-11-18 00:27:46 +00:00
|
|
|
rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
|
|
|
|
rtc->range_max = RTC_TIMESTAMP_END_2099;
|
2021-04-18 00:20:22 +00:00
|
|
|
rtc->uie_unsupported = 1;
|
|
|
|
|
|
|
|
if (client->irq > 0) {
|
2021-10-18 15:36:46 +00:00
|
|
|
err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38);
|
2021-04-18 00:20:22 +00:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = devm_request_threaded_irq(&client->dev, client->irq,
|
|
|
|
NULL, pcf8523_irq,
|
|
|
|
IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
|
2021-10-18 15:36:46 +00:00
|
|
|
dev_name(&rtc->dev), pcf8523);
|
2021-04-18 00:20:22 +00:00
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
dev_pm_set_wake_irq(&client->dev, client->irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source");
|
|
|
|
if (client->irq > 0 || wakeup_source)
|
|
|
|
device_init_wakeup(&client->dev, true);
|
2020-11-18 00:27:45 +00:00
|
|
|
|
|
|
|
return devm_rtc_register_device(rtc);
|
2012-12-18 00:02:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct i2c_device_id pcf8523_id[] = {
|
|
|
|
{ "pcf8523", 0 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, pcf8523_id);
|
|
|
|
|
|
|
|
static const struct of_device_id pcf8523_of_match[] = {
|
|
|
|
{ .compatible = "nxp,pcf8523" },
|
2018-12-18 21:52:12 +00:00
|
|
|
{ .compatible = "microcrystal,rv8523" },
|
2012-12-18 00:02:44 +00:00
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, pcf8523_of_match);
|
|
|
|
|
|
|
|
static struct i2c_driver pcf8523_driver = {
|
|
|
|
.driver = {
|
2021-04-18 00:20:21 +00:00
|
|
|
.name = "rtc-pcf8523",
|
2021-10-18 15:36:49 +00:00
|
|
|
.of_match_table = pcf8523_of_match,
|
2012-12-18 00:02:44 +00:00
|
|
|
},
|
|
|
|
.probe = pcf8523_probe,
|
|
|
|
.id_table = pcf8523_id,
|
|
|
|
};
|
|
|
|
module_i2c_driver(pcf8523_driver);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
|
|
|
|
MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|