Shaoyun Liu b0f6b8090e drm/amd/include: Update df 3.6 mask and shift definition ...

The register field hsas been changed in df 3.6, update to correct setting

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2018-06-13 13:45:23 -05:00

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asic_reg

drm/amd/include: Update df 3.6 mask and shift definition

2018-06-13 13:45:23 -05:00

ivsrcid

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linux

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amd_acpi.h

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amd_pcie_helpers.h

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amd_pcie.h

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amd_shared.h

drm/amdgpu: Add CG/PG flags for VCN

2018-05-24 00:16:57 -05:00

atom-bits.h

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atom-names.h

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atom-types.h

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atombios.h

drm/amd: add a new struct in atombios.h

2018-05-15 13:44:03 -05:00

atomfirmware.h

drm/amdgpu: correct SMU11 SYSPLL0 clock id values

2018-05-30 12:35:06 -05:00

atomfirmwareid.h

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cgs_common.h

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cik_structs.h

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displayobject.h

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dm_pp_interface.h

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kgd_kfd_interface.h

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kgd_pp_interface.h

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pptable.h

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soc15_hw_ip.h

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soc15_ih_clientid.h

drm/amdgpu/vg20:Add IH client ID for the 2nd UVD

2018-05-18 16:08:13 -05:00

v9_structs.h

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vega10_enum.h

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vega10_ip_offset.h

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vega20_ip_offset.h

drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files

2018-05-17 10:13:09 -05:00

vi_structs.h

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