Lai, Derek d97e631af2 drm/amd/display: Added power down for DCN10 ...

[Why]
The change of setting a timer callback on boot for 10 seconds is still
working, just lacked power down for DCN10.

[How]
Added power down for DCN10.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Derek Lai <Derek.Lai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-12-28 16:51:24 -05:00

..

dcn10_cm_common.c

drm/amd/display: remove dc context from transfer function

2020-09-15 17:52:42 -04:00

dcn10_cm_common.h

drm/amd/display: Implement CM dealpha and bias interfaces

2019-05-31 10:39:29 -05:00

dcn10_dpp_cm.c

drm/amd/display: Simplify bool comparison

2021-01-14 13:20:21 -05:00

dcn10_dpp_dscl.c

drm/amd/display: Defer GAMCOR and DSCL power down sequence to vupdate

2021-10-28 14:26:15 -04:00

dcn10_dpp.c

drm/amd/display: Increase linebuffer pixel depth to 36bpp.

2021-05-27 15:00:47 -04:00

dcn10_dpp.h

drm/amd/display: Remove the repeated dpp1_full_bypass declaration

2021-06-18 17:14:36 -04:00

dcn10_dwb.c

drm/amd/display: rename DCN1_0 kconfig to DCN

2019-11-13 15:29:44 -05:00

dcn10_dwb.h

drm/amd/display: rename DCN1_0 kconfig to DCN

2019-11-13 15:29:44 -05:00

dcn10_hubbub.c

drm/amd/display: Add support for SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616.

2021-05-27 15:00:47 -04:00

dcn10_hubbub.h

drm/amd/display: remove compbuf size wait

2021-07-21 13:39:25 -04:00

dcn10_hubp.c

drm/amd/display: log additional register state for debug

2021-07-21 13:39:25 -04:00

dcn10_hubp.h

drm/amd/display: log additional register state for debug

2021-07-21 13:39:25 -04:00

dcn10_hw_sequencer_debug.c

drm/amd/display: fix type mismatch error for return variable

2021-02-09 15:48:28 -05:00

dcn10_hw_sequencer_debug.h

drm/amd/display: cleanup of function pointer tables

2019-11-19 10:12:53 -05:00

dcn10_hw_sequencer.c

drm/amd/display: Fixed DSC would not PG after removing DSC stream

2021-11-24 15:07:39 -05:00

dcn10_hw_sequencer.h

drm/amd/display: Refactor visual confirm

2021-06-08 12:18:37 -04:00

dcn10_init.c

drm/amd/display: Added power down for DCN10

2021-12-28 16:51:24 -05:00

dcn10_init.h

drm/amd/display: cleanup of function pointer tables

2019-11-19 10:12:53 -05:00

dcn10_ipp.c

drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED

2019-11-13 15:29:44 -05:00

dcn10_ipp.h

drm/amd/display: add cyan_skillfish display support

2021-10-04 15:22:57 -04:00

dcn10_link_encoder.c

drm/amd/display: Add DP 2.0 SST DC Support

2021-09-01 16:55:10 -04:00

dcn10_link_encoder.h

drm/amd/display: Fix B0 USB-C DP Alt mode

2021-09-23 15:17:30 -04:00

dcn10_mpc.c

drm/amd/display: Refactor visual confirm

2021-06-08 12:18:37 -04:00

dcn10_mpc.h

drm/amd/display: add getter routine to retrieve mpcc mux

2020-12-23 15:02:55 -05:00

dcn10_opp.c

drm/amd/display: Raise DPG height during timing synchronization

2020-10-26 13:29:21 -04:00

dcn10_opp.h

drm/amd/display: Subsample mode suboptimal for YCbCr4:2:2

2019-09-13 17:54:53 -05:00

dcn10_optc.c

drm/amd/display: Add an extra check for dcn10 OPTC data format

2021-09-28 09:30:12 -04:00

dcn10_optc.h

drm/amd/display: log additional register state for debug

2021-07-21 13:39:25 -04:00

dcn10_resource.c

drm/amd/display: Fix dynamic link encoder access.

2021-09-14 15:57:09 -04:00

dcn10_resource.h

drm/amd/display: Use DCN functions instead of DCE

2019-05-24 12:21:00 -05:00

dcn10_stream_encoder.c

drm/amd/display: Handle Y carry-over in VCP X.Y calculation

2021-09-29 17:30:00 -04:00

dcn10_stream_encoder.h

drm/amd/display: Add DPCD writes at key points

2021-09-14 15:57:09 -04:00

Makefile

drm/amdgpu/display: drop DCN support for aarch64

2021-01-05 11:35:53 -05:00