Ville Syrjälä 4e8e7eb703 drm/i915: Pipe timing registers need an offset on VLV ...

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2013-01-24 23:13:13 +01:00

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drm

drm/i915: Pipe timing registers need an offset on VLV

2013-01-24 23:13:13 +01:00

stub

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vga

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux

2012-12-17 08:26:17 -08:00

Makefile

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