Commit Graph

58674 Commits

Author SHA1 Message Date
Thomas Hellstrom
b1d05b4fc6 drm/vmwgfx: Remove the user resource destructor check
We were checking that the resource destructor matched that of the
intended object type, to make sure the looked up resource was of the
right type.

But we already have an object type check in place which makes sure the
resource is of the right type.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2018-09-27 15:21:37 +02:00
Thomas Hellstrom
13289241fe drm/vmwgfx: Remove the resource avail field
This field was previously used to prevent a lookup of a resource before its
constructor had run to its end. This was mainly intended for an interface
that is now removed that allowed looking up a resource by its device id.

Currently all affected resources are added to the lookup mechanism (its
TTM prime object is initialized) late in the constructor where it's OK to
look up the resource.

This means we can change the device resource_lock to an ordinary spinlock
instead of an rwlock and remove a locking sequence during lookup.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2018-09-27 15:21:37 +02:00
Thomas Hellstrom
d76ce03e1a drm/vmwgfx: Replace unconditional mutex unlocked warnings with lockdep counterpart
Replace instances of WARN_ON[_ONCE](!mutex_is_held()) with
lockdep_assert_held(). This makes sure the checking process actually
holds the mutex and also removes the checks from release builds

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2018-09-27 15:21:37 +02:00
Thomas Hellstrom
cc1e3b796b drm/vmwgfx: Reduce the size of buffer object relocations
With the new allocator this leads to less consumed memory for each
user-space command submission

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2018-09-27 15:21:36 +02:00
Thomas Hellstrom
fc18afcf5f drm/vmwgfx: Use a validation context allocator for relocations and validations
A common trait of these objects are that they are allocated during the
command validation phase and freed after command submission. Furthermore
they are accessed by a single thread only. So provide a simple unprotected
stack-like allocator from which these objects can be allocated. Their
memory is freed with the validation context when the command submission
is done.

Note that the mm subsystem maintains a per-cpu cache of single pages to
make single page allocation and freeing efficient.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-09-27 15:21:36 +02:00
Thomas Hellstrom
2724b2d54c drm/vmwgfx: Use new validation interface for the modesetting code v2
Strip the old KMS helpers and use the new validation interface also in
the modesetting code.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com> #v1
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-09-27 15:21:36 +02:00
Thomas Hellstrom
9c079b8ce8 drm/vmwgfx: Adapt execbuf to the new validation api
Strip the old execbuf validation functionality and use the new API instead.
Also use the new API for a now removed execbuf function that was called
from the kms code.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-09-27 15:21:36 +02:00
Thomas Hellstrom
84e1bf06bc drm/vmwgfx: Modify the resource validation interface
Allow selecting interruptible or uninterruptible waits to match
expectations of callers.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-09-27 15:21:36 +02:00
Thomas Hellstrom
038ecc5032 drm/vmwgfx: Add a validation module v2
Isolate the functionality needed for reservation, validation and fencing
of vmwgfx buffer objects and resources and publish an API for this.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com> #v1
2018-09-27 15:21:35 +02:00
Thomas Hellstrom
0b8762e997 drm/ttm, drm/vmwgfx: Move the lock- and object functionality to the vmwgfx driver
No other driver is using this functionality so move it out of TTM and
into the vmwgfx driver. Update includes and remove exports.
Also annotate to remove false static analyzer lock balance warnings.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-09-27 15:19:20 +02:00
Benjamin Gaignard
53273b5222 drm: stm: implement get_scanout_position function
Hardware allow to read the position in scanout buffer so
we can use this information to make wait of vblank more accurate.

Active area bounds (start, end, total height) have already been
computed and written in ltdc registers, read them and get the
current line position to compute vpos value.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Tested-by: Yannick Fertré <yannick.fertre@st.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180629130140.16004-1-benjamin.gaignard@linaro.org
2018-09-27 15:04:26 +02:00
Chris Wilson
a2bf92e8cc drm/i915/execlists: Avoid kicking priority on the current context
If the request is currently on the HW (in port 0), then we do not need
to kick the submission tasklet to evaluate whether we should be
preempting itself in order to execute it again.

In the case that was annoying me:

   execlists_schedule: rq(18:211173).prio=0 -> 2
   need_preempt: last(18:211174).prio=0, queue.prio=2

We are bumping the priority of the first of a pair of requests running
in the current context. Then when evaluating preempt, we would see that
that our priority request is higher than the last executing request in
ELSP0 and so trigger preemption, not realising that our intended request
was already executing.

v2: As we assume state of the execlists->port[] that is only valid while
we hold the timeline lock we have to repeat some earlier tests that on
the validity of the node.
v3: Wrap guc submission under the timeline.lock as is now the way of all
things.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180925083205.2229-2-chris@chris-wilson.co.uk
2018-09-27 13:45:20 +01:00
Stefan Mavrodiev
17fd7a9d32 drm/panel: Add support for Olimex LCD-OLinuXino panel
This patch adds Olimex Ltd. LCD-OLinuXino bridge panel driver. The panel
is used with different LCDs (currently from 480x272 to 1280x800). A
small EEPROM chip is used for identification, which holds some factory
data and timing requirements.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531383729-13932-1-git-send-email-stefan@olimex.com
2018-09-27 14:27:24 +02:00
Marco Felsch
6cbe7cd15f drm/panel: simple: Add DLC1010GIG panel
Add support for the DLC DLC1010GIG 1280x800 10.1" LVDS panel to the
simple-panel driver.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180924152610.25939-1-m.felsch@pengutronix.de
2018-09-27 14:23:12 +02:00
Chen-Yu Tsai
7ad8b41cd8 drm/panel: simple: Add support for Banana Pi 7" S070WV20-CT16 panel
This panel is marketed as Banana Pi 7" LCD display. On the back is
a sticker denoting the model name S070WV20-CT16.

This is a 7" 800x480 panel connected through a 24-bit RGB interface.
However the panel only does 262k colors.

Depending on the variant, the PCB attached to the panel module either
supports DSI, or DSI + 24-bit RGB. DSI is converted to 24-bit RGB via
an onboard ICN6211 MIPI DSI - RGB bridge chip, then fed to the panel
itself.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180907041948.19913-5-wens@csie.org
2018-09-27 14:21:22 +02:00
Heiko Stuebner
882c35af56 drm/panel: p079zca: unconditionally remove the panel on removal
There is no need to check innolux->base.dev when trying to remove
the panel, as that variable is always set directly before the panel
gets added and will still be available on panel_remove.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180816140920.5009-1-heiko@sntech.de
2018-09-27 14:04:00 +02:00
Giulio Benetti
e58edce616 drm/panel: add panel CDTech S043WQ26H-CT7 to panel-simple
This patch adds support for CDTech S043WQ26H-CT7 480x272 4.3" panel to
DRM simple panel driver.

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730231117.5631-5-giulio.benetti@micronovasrl.com
2018-09-27 13:57:48 +02:00
Giulio Benetti
982f944ed7 drm/panel: add panel CDTech S070WV95-CT16 to panel-simple
This patch adds support for CDTech S070WV95-CT16 800x480 7" panel to DRM
simple panel driver.

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180730231117.5631-3-giulio.benetti@micronovasrl.com
2018-09-27 13:57:00 +02:00
Jani Nikula
7fe78985cd drm/i915/csr: restructure CSR firmware definition macros
Use uniform prefixes for firmware path, version and size. Unify
alignments. Order macro groups as in the if ladder using them. Add
platform specific max firmware size macros for all platforms for clarity
in the if ladder. Place the max firmware size macros in the platform
specific macro groups.

No functional changes.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927075311.5076-1-jani.nikula@intel.com
2018-09-27 14:55:40 +03:00
Fabio Estevam
db2b0e5ffc drm/panel: seiko-43wvf1g: Add missing ">" character in author's email
There is a missing ">" character in Marco's email.

Fix it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532575167-14754-2-git-send-email-festevam@gmail.com
2018-09-27 13:55:20 +02:00
Fabio Estevam
6bf18d84f7 drm/panel: seiko-43wvf1g: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1532575167-14754-1-git-send-email-festevam@gmail.com
2018-09-27 13:53:11 +02:00
Andrzej Hajda
e077e2f5f8 drm/panel: simple: fix BOE/HV070WSA-100 timings
Panel timings were taken from vendor code and are not fully correct -
refresh rate is about 50Hz instead of 60Hz. The patch fixes it.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180725154644.25412-9-a.hajda@samsung.com
2018-09-27 13:51:28 +02:00
Hans de Goede
1f0eb8b810 drm: panel-orientation-quirks: Add quirk for GPD win2
GPD has done it again, make a nice device (good), use way too generic
DMI strings (bad) and use a portrait screen rotated 90 degrees (ugly).

Because of the too generic DMI strings this entry is also doing bios-date
matching, so the gpd_win2 data struct may very well need to be updated
with some extra bios-dates in the future.

Reported-and-tested-by: russianneuromancer@ya.ru
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180909133457.10636-3-hdegoede@redhat.com
2018-09-27 13:41:07 +02:00
Hans de Goede
9531221df8 drm/i915: Check for panel orientation quirks on eDP panels
So far we have only been calling
drm_connector_init_panel_orientation_property(), which checks for
panel orientation quirks in the drm_panel_orientation_quirks.c file,
for DSI panels as so far only devices with DSI panels have had panels
which are not mounted up right.

The new GPD win2 device uses a portrait screen in a landscape case,
so now we've a device with an eDP panel which needs the panel-orientation
property to let the fbcon code and userspace know that the image needs to
be fixed-up.

This commit makes intel_edp_init_connector() call
drm_connector_init_panel_orientation_property() so that the property
gets added.

Reported-and-tested-by: russianneuromancer@ya.ru
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180909133457.10636-2-hdegoede@redhat.com
2018-09-27 13:36:49 +02:00
Arnd Bergmann
064b06bbf1 drm/imx: fix build failure without CONFIG_DRM_FBDEV_EMULATION
The variable is declared in an #ifdef section, but the user is
now unconditional, which leads to a build failure:

drivers/gpu/drm/imx/imx-drm-core.c: In function 'imx_drm_bind':
drivers/gpu/drm/imx/imx-drm-core.c:264:6: error: 'legacyfb_depth' undeclared (first use in this function); did you mean 'lockdep_depth'?

Remove the remaining #ifdef as well.

Fixes: f53705fd98 ("drm/imx: Use drm_fbdev_generic_setup()")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926193846.2490574-1-arnd@arndb.de
2018-09-27 13:13:45 +02:00
Chris Wilson
4bdafb9ddf drm/i915: Remove i915.enable_ppgtt override
Now that we are confident in providing full-ppgtt where supported,
remove the ability to override the context isolation.

v2: Remove faked aliasing-ppgtt for testing as it no longer is accepted.
v3: s/USES/HAS/ to match usage and reject attempts to load the module on
old GVT-g setups that do not provide support for full-ppgtt.
v4: Insulate ABI ppGTT values from our internal enum (later plans
involve moving ppGTT depth out of the enum, thus potentially breaking
ABI unless we document the current values).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Zhi Wang <zhi.a.wang@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926201222.5643-1-chris@chris-wilson.co.uk
2018-09-27 12:05:31 +01:00
Tvrtko Ursulin
c5f6d57895 drm/i915: Log HWS seqno consistently
We mix hexa- and decimal which is confusing when reading the logs. So make
the single odd one out instance decimal for consistency.

v2:
 * Do the intel_ringbuffer.c as well. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926145033.16318-1-tvrtko.ursulin@linux.intel.com
2018-09-27 11:27:13 +01:00
Tvrtko Ursulin
f8e57863f8 drm/i915: Trim partial view sg lists
Partial views are small but there can be many of them, and since the sg
list space for them is allocated pessimistically, we can save some slab by
trimming the unused tail entries.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926080353.20867-1-tvrtko.ursulin@linux.intel.com
2018-09-27 11:26:52 +01:00
Heiko Stuebner
4f297df89d drm/rockchip: vop: add rk3188 hs_start interrupt as dsp_hold equivalent
The hs_start interrupt on rk3188 fires at the start of a new frame, so
serves essentially the same purpose as the dsp_hold_valid irq in checking
when the last frame got delivered when going to standby. So define it
to fix a hang on atomic_disable of the vop because the completion never
really completed before.

Fixes: 428e15cc41 ("drm/rockchip: vop: add rk3188 vop definitions")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sandy Huang <hjc@rock-chips.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180923123730.14706-1-heiko@sntech.de
2018-09-27 11:39:32 +02:00
Thomas Zimmermann
9cb5f4873b drm/atmel-hlcdc: Replace drm_dev_unref with drm_dev_put
This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann <contact@tzimmermann.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180701132415.10161-1-contact@tzimmermann.org
2018-09-27 11:04:18 +02:00
Chen-Yu Tsai
3dcf0f306d Revert "drm/sun4i: Remove R40 display pipeline compatibles"
This reverts commit 3510e7a7f9.

During the 4.19 merge window for drm-misc, two patches critical to
supporting the display pipeline on the Allwinner R40 SoC were missed.
They were applied later but missed the merge window deadline. As a
result 4.19-rc1 kernel would crash on the R40 when it couldn't parse
the new device tree structure. We ended up removing support for the
R40 display pipeline for 4.19.

Since the missing patches are already merged for 4.20, we can now
revert the commit that removed support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180921142743.8711-1-wens@csie.org
2018-09-27 04:18:07 -04:00
Chris Wilson
dee4a0f8e7 drm/i915/selftests: Smoketest preemption
Very light stress test to bombard the submission backends with a large
stream with requests of randomly assigned priorities. Preemption will be
occasionally requested, but unlikely to ever succeed! (Although we may
build a long queue of requests and so may trigger an attempt to inject a
preempt context, as we emit no batch, the arbitration window is limited
to between requests inside the ringbuffer. The likelihood of actually
causing a preemption event is therefore very small. A later variant
should try to improve the likelihood of preemption events!)

v2: Include a second pattern with more frequent preemption

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180925083205.2229-1-chris@chris-wilson.co.uk
2018-09-27 08:10:26 +01:00
Sean Paul
7b76d05884 Merge drm/drm-next into drm-misc-next
Backmerging 4.19-rc5 to pick up sun4i fix

Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-09-27 02:54:54 -04:00
Jani Nikula
e7351a8474 drm/i915/csr: bypass firmware request on i915.dmc_firmware_path=""
With i915.dmc_firmware_path="" it's obvious the intention is to disable
CSR firmware loading. Bypass the firmware request altogether in this
case, with more obvious debug logging.

v2: Use DRM_INFO for logging (Chris)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926133414.22073-3-jani.nikula@intel.com
2018-09-27 09:25:19 +03:00
Jani Nikula
d8a5b7d79f drm/i915/csr: keep max firmware size together with firmare name and version
Move max firmware size to the same if ladder with firmware name and
required version. This allows us to detect the missing max size for a
platform without actually loading the firmware, and makes the whole
thing easier to maintain.

We need to move the power get earlier to allow for early return in the
missing platform case. While at it, extend the comment on why we return
with the reference held on errors.

We also need to move the module parameter override later to reuse the
max firmware size, which is independent of the override.

v2: Add comment on why we leak the wakeref on errors (Chris)

v3: Rebase

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926133414.22073-2-jani.nikula@intel.com
2018-09-27 09:25:10 +03:00
Jani Nikula
180e9d230e drm/i915/csr: keep firmware name and required version together
Having two separate if ladders gets increasingly hard to maintain. Put
them together.

v2: Rebase

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180926133414.22073-1-jani.nikula@intel.com
2018-09-27 09:24:49 +03:00
Alex Deucher
d30e63b159 drm/amdgpu/vcn: whitespace cleanup
Fix some indentation issues.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:26 -05:00
Alex Deucher
81bb773f35 drm/amdgpu/soc15: fix warnings in register macro
expects argument of type ‘unsigned int’ has type ‘long int’

Fixes: 52e211c1f0 ("drm/amdgpu:Add error message when register failed to reach expected value")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:26 -05:00
James Zhu
a3716d3a06 drm/amdgpu:Enable DPG mode on PCO
Add flag AMD_PG_SUPPORT_DPG to enable DPG mode on Picasso

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:25 -05:00
James Zhu
bd5d5180db drm/amdgpu:Add DPG pause mode support
Add functions to support VCN DPG pause mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:25 -05:00
James Zhu
0b8690b7a8 drm/amdgpu:Add DPG pause state
Add DPG pause state to support VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:25 -05:00
James Zhu
63e9bb1d98 drm/amdgpu:Add DPG mode support for vcn 1.0
Add DPG mode start/stop/mc_resume/clock_gating to
support vcn 1.0 DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:24 -05:00
James Zhu
03d6e3aac8 drm/amdgpu:Add DPG mode read/write macro
Some registers read/write needs program through SDRAM pool under
DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:24 -05:00
James Zhu
f28ff06210 drm/amdgpu:Add DPG support flag
Add DPG support flag for VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:23 -05:00
James Zhu
b604545b92 drm/amdgpu:Add new register offset/mask to support VCN DPG mode
New register offset/mask need to be added to support VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:23 -05:00
James Zhu
21cbe2f38c drm/amdgpu:Use register UVD_SCRATCH9 for VCN ring/ib test
Use register UVD_SCRATCH9 for VCN ring/ib test. Since those registers
can't be directly accessed under DPG(Dynamic Power Gate) mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:23 -05:00
Christian König
1ffdeca648 drm/amdgpu: move more defines into amdgpu_irq.h
Everything that isn't related to the IH ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:22 -05:00
Christian König
1f8969463b drm/amdgpu: move more interrupt processing into amdgpu_irq.c
Add a callback to amdgpu_ih_process to remove most of the IV logic.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:22 -05:00
Andrey Grodzovsky
95d7fc4a41 drm/amdgpu: Move fence SW fallback warning v3
Only print the warning if there was actually some fence processed
from the SW fallback timer.

v2: Add return value to amdgpu_fence_process to let
amdgpu_fence_fallback know fences were actually
processed and then print the warning.

v3: Always return true if seq != last_seq

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:21 -05:00
Christian König
425c31437f drm/amdgpu: cleanup amdgpu_ih.c
Cleanup amdgpu_ih.c to be able to handle multiple interrupt rings.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-26 21:09:21 -05:00