Commit Graph

58171 Commits

Author SHA1 Message Date
Jun Lei
04a789bef3 drm/amd/display: add stream ID and otg instance in dc_stream_state
[why]
stream ID allows DMs to avoid memory address comparisons to compare
stream equality.
otg_instance allows DC to more rigorously define when otg_instance
can change.  specifically, it is now defined to be only mutable when dc_stream_state
changes.  This is better than a "get status" function which prevents efficient
caching of otherwise very stable information.

[how]
stream ID follows similar pattern to sink ID, which is already implemented

otg_instance is an output which occurs on all dc_stream modification functions

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:37 -05:00
Dmytro Laktyushkin
fb57452fb4 drm/amd/display: update DCN dml calcs
DV have made updates to DCN dml which we need to pull in

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:37 -05:00
David Francis
923fe49512 drm/amd/display: Detach backlight from stream
[Why]
Backlight is conceptually a property of links, not streams.
All backlight programming is done on links, but there is a
stream property bl_pwm_level that is used to restore backlight
on dpms on and s3 resume.  This is unnecessary, as backlight
is already restored by hardware with no driver intervention.

[How]
Remove bl_pwm_level, and the stream argument to set_backlight

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:36 -05:00
Imad Syed
923a3743ab drm/amd/display: Remove unused headers
They're not being used, so remove them.

Signed-off-by: Imad Syed <imad.syed@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:36 -05:00
Jun Lei
ceb3dbb469 drm/amd/display: remove sink reference in dc_stream_state
[why]
dc_stream_state containing a pointer to sink is poor design.
Sink describes the display, and the specifications or capabilities
it has.  That information is irrelevant for dc_stream_state, which describes
hardware state, and is generally used for hardware programming.  It
could further be argued that dc_sink itself is just a convenience dc
provides, and DC should be perfectly capable of programming hardware
without any dc_sinks (for example, emulated sinks).

[how]
Phase 1:
Deprecate use of dc_sink pointer in dc_stream.  Most references are trivial
to remove, but some call sites are risky (such as is_timing_changed) with
no obvious logical replacement.  These will be removed in follow up change.

Add dc_link pointer to dc_stream.  This is the typical reason DC really needed
sink pointer, and most call sites are replaced with this.

DMs also need minor updates, as all 3 DMs leverage stream->sink for
some functionality.  this is replaced instead by a pointer to private data
inside dc_stream_state, which is used by DMs as a quality of life improvment
for some key functionality.  it allows DMs to set pointers have to their own objects
which associate OS objects to dc_stream_states (such as DisplayTarget
and amdgpu_dm_connector).  Without the private pointer, DMs would be
forced to perform a lookup for callbacks.

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:36 -05:00
Hugo Hu
51ba137ef2 drm/amd/display: Add debug option to force fclk request
[Why]
So that we can adjust fclk for debugging purposes.

[How]
Add option to force adjust fclk request to pplib.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:35 -05:00
Eric Yang
987741af33 drm/amd/display: update bw formula to v252
[why]
There was a recent fix in the BW spreadsheet to allow timing with very
large vblank. Need to be ported into driver.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:35 -05:00
Krunoslav Kovac
ef32bc1c75 drm/amd/display: Fix issue with VLine interrupt not firing
[Why]
We are not correctly handling the wrap around case.
VLine interrupt is relative to position of VUpdate interrupt.

Both VUpdate interrupt and VLine interrupt could possibly
be in front porch or back porch.

[How]
Fix wraparound case by checking for line number that is
greater than the VTOTAL of the OTG timing. In this case,
the interrupt should occur on the next frame.

Also fix some variable naming and remove some dead code.

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:34 -05:00
Lewis Huang
ebd084cd65 drm/amd/display: add plane size change check condition
[Why]
Driver didn't check plane size and surface size is mismatch.
It will cause pitch data incorrect.

[How]
Add condition to check is plane change and update surface

Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:34 -05:00
Wenjing Liu
d5cf79eeda drm/amd/display: implement dc_init_callbacks to assign callback pointers after dc_create
[why]
Some components depend on dc to constuct
but need to assign callback functions to dc.

[how]
Instead of assigning dc callback functions in dc_create,
decouple the callback init to a standlone function after dc_create. This
is currently a no-op.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:33 -05:00
Dmytro Laktyushkin
630cb40ffd drm/amd/display: Remove some extra braces
Remove braces around single-line conditionals

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:33 -05:00
Fatemeh Darbehani
1c164f7082 drm/amd/display: Add pixel clock values to dtn logs
[Why]
To make sure future changes in DAL for SMU msgs will not change the current behaviour
and to make sure clock registeres are programmed correctly based on SMU msgs
that DAL sends.

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:33 -05:00
Eric Bernstein
da1043cf22 drm/amd/display: Fix runtime errors for diagnostic tests
1) Rename and make public definition of input CSC matrix struct.
2) Make wm_read_state() function an interface of hubbub, and check
   if watermark registers exist before read/write to them.
3) Check if OTG_INTERLACE_CONTROL register exists before updating
4) Add dummy functions for set_input/output_transfer function to avoid
   errors due to differences in CM registers.
5) Added missing register field definition in header file

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:32 -05:00
Eric Bernstein
60a804c848 drm/amd/display: Expose hubp1_vready_workaround function
Expose this function for future use.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:32 -05:00
Jun Lei
f9ed8fdcd2 drm/amd/display: Add a PP_SMU_VER_MAX enum
Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:31 -05:00
Steven Chiu
fda2019cf2 drm/amd/display: 3.2.09
Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Shahin Khayyer <Shahin.Khayyer@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:31 -05:00
wentalou
14d20ec7f3 drm/amdgpu: psp_ring_destroy cause psp->km_ring.ring_mem NULL
psp_ring_destroy inside psp_load_fw cause psp->km_ring.ring_mem NULL.
Call Trace occurred when psp_cmd_submit.
should be psp_ring_stop instead.

Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:31 -05:00
Xiangliang Yu
76223c5496 drm/amdgpu/psp: Fix can't detect psp INVOKE command failed
There isn't ucode when executing INVOKE command, so current code can't
check the failure of INVOKE command.

Remove the ucode check.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:30 -05:00
Oak Zeng
898e0d9d40 drm/amdgpu: Use sdma_engine array
Use sdma_engine[8] array instead of sdma_engine0~7 so it is easier
to program.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:30 -05:00
Xiangliang Yu
a363553cf0 drm/amdgpu/psp: Fix to get wrong xgmi session id
Driver get session id after loading TA FW and the session id is used
by driver instances to communicate with TA. PF and VF have different
session id.

xGMI session id should get from response buffer, correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:29 -05:00
Amber Lin
308176d6f6 drm/amdgpu: Remove kgd2kfd function pointers
kgd2kfd function pointers and global kgd2kfd pointer are no longer in use.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:29 -05:00
Amber Lin
8e07e2676a drm/amdgpu: Simplify kgd2kfd interface
After amdkfd is merged into amdgpu module, amdgpu can call amdkfd
functions directly.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:29 -05:00
Amber Lin
2d3d25b616 drm/amdgpu: Relocate kgd2kfd function declaration
Since amdkfd is merged into amdgpu module and amdgpu can access amdkfd
directly, move declaration of kgd2kfd functions from kfd_priv.h to
amdgpu_amdkfd.h

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:28 -05:00
Christian König
4ed46c6c4e drm/amdgpu: disable system memory page tables for now
We hit a problem with IOMMU with that. Disable until we have time to
debug further.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:28 -05:00
Jim Qu
b163714b29 drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hang
effect asics: VEGA10 and VEGA12

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:27 -05:00
Tao Zhou
919a94d810 drm/amdgpu: fix CPDMA hang in PRT mode for VEGA20
Fix CPDMA hang in PRT mode for both VEGA10 and VEGA20

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Tested-by: Yukun.Li <yukun1.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:27 -05:00
Evan Quan
d1a3e239a6 drm/amd/powerplay: drop the unnecessary uclk hard min setting
Since soft min setting is enough. Hard min setting is redundant.

Reported-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:27 -05:00
Evan Quan
c81e42f036 drm/amd/powerplay: avoid possible buffer overflow
Make sure the clock level enforced is within the allowed
ranges.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:26 -05:00
Evan Quan
45b35ee021 drm/amd/powerplay: create pp_od_clk_voltage device file under OD support
Since pp_od_clk_voltage device file is for OD related sysfs operations.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:26 -05:00
Evan Quan
445938879e drm/amd/powerplay: update OD support flag for SKU with no OD capabilities
For those ASICs with no overdrive capabilities, the OD support flag
will be reset.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:25 -05:00
Likun Gao
a7a0d543ca drm/amdgpu: make gfx9 enter into rlc safe mode when set MGCG
MGCG should RLC enter into safe mode first.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:25 -05:00
Kent Russell
c4312c27c8 drm/amdgpu: Cleanup 2 compiler warnings
These 2 variables are unused now, so remove their references.

Fixes: e4ae0fc drm/amdgpu: implement gfx8 post_soft_reset
Fixes: 5e01c09 drm/amdgpu/gfx_v8_0: Reorder the gfx, kiq and kcq rings
test sequence

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:24 -05:00
Tiecheng Zhou
c6064de4b7 drm/amdgpu/gfx_v8_0: Reorder the gfx, kiq and kcq rings test sequence
The kiq ring and the very first compute ring may fail occasionally
if they are tested directly following kiq_kcq_enable.

Insert the gfx ring test before kiq ring test to delay the kiq and kcq
ring tests will fix the issue.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:24 -05:00
Emily Deng
d3c117e564 drm/amdgpu/sriov:Correct pfvf exchange logic
The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu
reset.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-By: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:24 -05:00
Evan Quan
c27c9778a1 drm/amd/powerplay: support BOOTUP_DEFAULT power profile mode
This can avoid unexpected profile mode change after running
compute workload.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:23 -05:00
Emily Deng
91334223b2 drm/amdgpu/virtual_dce: No need to pin the cursor bo
For virtual display feature, no need to pin cursor bo.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:23 -05:00
Emily Deng
094e640dcf drm/amdgpu/virtual_dce: No need to pin the fb's bo
For virtual display, no need to pin the fb's bo.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-14 15:04:22 -05:00
Juha-Pekka Heikkila
d8af327087 drm/i915: Fix ILK-IVB primary plane enable delays
Primary and sprite plane enable on ILK-IVB may take two frames to complete

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103925
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1545305168-6047-1-git-send-email-juhapekka.heikkila@gmail.com
2019-01-14 21:36:51 +02:00
Ville Syrjälä
ed20151a76 drm/vblank: Allow dynamic per-crtc max_vblank_count
On i965gm we need to adjust max_vblank_count dynamically
depending on whether the TV encoder is used or not. To
that end add a per-crtc max_vblank_count that takes
precedence over its device wide counterpart. The driver
can now call drm_crtc_set_max_vblank_count() to configure
the per-crtc value before calling drm_vblank_on().

Also looks like there was some discussion about exynos needing
similar treatment.

v2: Drop the extra max_vblank_count!=0 check for the
    WARN(last!=current), will take care of it in i915 code (Daniel)
    WARN_ON(!inmodeset) (Daniel)
    WARN_ON(dev->max_vblank_count)
    Pimp up the docs (Daniel)

Cc: stable@vger.kernel.org
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127182004.28885-1-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2019-01-14 21:23:55 +02:00
Chris Wilson
4a8ab5ea0c drm/i915: Mark up Ironlake ips with rpm wakerefs
Currently Ironlake operates under the assumption that rpm awake (and its
error checking is disabled). As such, we have missed a few places where we
access registers without taking the rpm wakeref and thus trigger
warnings. intel_ips being one culprit.

As this involved adding a potentially sleeping rpm_get, we have to
rearrange the spinlocks slightly and so switch to acquiring a device-ref
under the spinlock rather than hold the spinlock for the whole
operation. To be consistent, we make the change in pattern common to the
intel_ips interface even though this adds a few more atomic operations
than necessary in a few cases.

v2: Sagar noted the mb around setting mch_dev were overkill as we only
need ordering there, and that i915_emon_status was still using
struct_mutex for no reason, but lacked rpm.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-21-chris@chris-wilson.co.uk
2019-01-14 16:18:44 +00:00
Chris Wilson
8d761e773e drm/i915: Combined gt.awake/gt.power wakerefs
As the GT_IRQ power domain implies a wakeref, we can use it inplace of
our existing redundant rpm grab.

v2: Drop papering over forgetting to take the runtime wakeref in
selftests

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-20-chris@chris-wilson.co.uk
2019-01-14 16:18:43 +00:00
Chris Wilson
04161d64da drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice
As we only release each power well once, we assume that each transcoder
maps to a different domain. Complain if this is not so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-19-chris@chris-wilson.co.uk
2019-01-14 16:18:42 +00:00
Chris Wilson
69d9382005 drm/i915/dp: Markup pps lock power well
Track where and when we acquire and release the power well for pps
access along the dp aux link, with a view to detecting if we leak any
wakerefs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-18-chris@chris-wilson.co.uk
2019-01-14 16:18:40 +00:00
Chris Wilson
25c896bdb8 drm/i915: Track the wakeref used to initialise display power domains
On module load and unload, we grab the POWER_DOMAIN_INIT powerwells and
transfer them to the runtime-pm code. We can use our wakeref tracking to
verify that the wakeref is indeed passed from init to enable, and
disable to fini; and across suspend.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-17-chris@chris-wilson.co.uk
2019-01-14 16:18:38 +00:00
Chris Wilson
0e6e0be4c9 drm/i915: Markup paired operations on display power domains
The majority of runtime-pm operations are bounded and scoped within a
function; these are easy to verify that the wakeref are handled
correctly. We can employ the compiler to help us, and reduce the number
of wakerefs tracked when debugging, by passing around cookies provided
by the various rpm_get functions to their rpm_put counterpart. This
makes the pairing explicit, and given the required wakeref cookie the
compiler can verify that we pass an initialised value to the rpm_put
(quite handy for double checking error paths).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-16-chris@chris-wilson.co.uk
2019-01-14 16:18:30 +00:00
Chris Wilson
d4225a535b drm/i915: Syntatic sugar for using intel_runtime_pm
Frequently, we use intel_runtime_pm_get/_put around a small block.
Formalise that usage by providing a macro to define such a block with an
automatic closure to scope the intel_runtime_pm wakeref to that block,
i.e. macro abuse smelling of python.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-15-chris@chris-wilson.co.uk
2019-01-14 16:18:25 +00:00
Chris Wilson
c9d08cc3e3 drm/i915/selftests: Mark up rpm wakerefs
Track the temporary wakerefs used within the selftests so that leaks are
clear.

v2: Add a couple of coarse annotations for mock selftests as we now
loudly warn about the errors.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-14-chris@chris-wilson.co.uk
2019-01-14 16:18:20 +00:00
Chris Wilson
2cb2cb5ff4 drm/i915/panel: Track temporary rpm wakeref
Keep track of the temporary rpm wakeref used for panel backlight access,
so that we can cancel it immediately upon release and so more clearly
identify leaks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-13-chris@chris-wilson.co.uk
2019-01-14 16:18:19 +00:00
Chris Wilson
6a712a20bf drm/i915/hotplug: Track temporary rpm wakeref
Keep track of the temporary rpm wakeref inside hotplug detection, so
that we can cancel it immediately upon release and so clearly identify
leaks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-12-chris@chris-wilson.co.uk
2019-01-14 16:18:18 +00:00
Chris Wilson
1d264d91be drm/i915/fb: Track rpm wakerefs
Keep track of the rpm wakeref used for framebuffer access so that we can
cancel upon release and so more clearly identify leaks.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190114142129.24398-11-chris@chris-wilson.co.uk
2019-01-14 16:18:16 +00:00