Building a combined ARMv4+XScale kernel produces these
and other build failures:
/tmp/copypage-xscale-3aa821.s: Assembler messages:
/tmp/copypage-xscale-3aa821.s:167: Error: selected processor does not support `pld [r7,#0]' in ARM mode
/tmp/copypage-xscale-3aa821.s:168: Error: selected processor does not support `pld [r7,#32]' in ARM mode
/tmp/copypage-xscale-3aa821.s:169: Error: selected processor does not support `pld [r1,#0]' in ARM mode
/tmp/copypage-xscale-3aa821.s:170: Error: selected processor does not support `pld [r1,#32]' in ARM mode
/tmp/copypage-xscale-3aa821.s:171: Error: selected processor does not support `pld [r7,#64]' in ARM mode
/tmp/copypage-xscale-3aa821.s:176: Error: selected processor does not support `ldrd r4,r5,[r7],#8' in ARM mode
/tmp/copypage-xscale-3aa821.s:180: Error: selected processor does not support `strd r4,r5,[r1],#8' in ARM mode
Add an explict .arch armv5 in the inline assembly to allow the ARMv5
specific instructions regardless of the compiler -march= target.
Link: https://lore.kernel.org/r/20190809163334.489360-5-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now that iop3xx and iop13xx are gone, the iop-adma driver no
longer needs to deal with incompatible register layout defined
in machine specific header files.
Move the iop32x specific definitions into drivers/dma/iop-adma.h
and the platform_data into include/linux/platform_data/dma-iop32x.h,
and change the machine code to no longer reference those.
The DMA0_ID/DMA1_ID/AAU_ID macros are required as part of the
platform data interface and still need to be visible, so move
those from one header to the other.
Link: https://lore.kernel.org/r/20190809163334.489360-4-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are three families of IOP machines we support in Linux: iop32x
(which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x).
All products we support in the kernel are based on the first of these,
iop32x, the other families only ever supported the Intel reference
boards but no actual machine anyone could ever buy.
While one could clearly make them all three work in a single kernel
with some work, this takes the easy way out, removing the later two
platforms entirely, under the assumption that there are no remaining
users.
Earlier versions of OpenWRT and Debian both had support for iop32x
but not the others, and they both dropped iop32x as well in their 2015
releases.
Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts
Acked-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This removes the old Winbond w90x900 platform, also known
as Nuvoton NUC900. Wan Zongshun originally contributed
the port and maintained it since then.
From all I can tell, this platform is no longer being used
with modern kernels, based on various indications:
- The supported chips (nuc910/950/960) are no longer marketed
by the manufacturer
- Newer chips from the same family (nuc97x, nuc980, n329x)
that are still marketed have Linux BSPs but those were never
submitted for upstream inclusion.
- The last patch from the platform maintainer was in 2011.
- All patches to w90x900 platform specific files afterwards
are cleanups that were apparently done without access to
test hardware.
- Both the website and the email address listed in the
MAINTAINERS have become unreachable.
Link: https://lore.kernel.org/r/20190809202749.742267-17-arnd@arndb.de
Cc: "Wanzongshun (Vincent)" <wanzongshun@huawei.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull in generic CPU topology changes from Paul Walmsley (RISC-V).
* tag 'common/for-v5.4-rc1/cpu-topology' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
MAINTAINERS: Add an entry for generic architecture topology
base: arch_topology: update Kconfig help description
RISC-V: Parse cpu topology during boot.
arm: Use common cpu_topology structure and functions.
cpu-topology: Move cpu topology code to common code.
dt-binding: cpu-topology: Move cpu-map to a common binding.
Documentation: DT: arm: add support for sockets defining package boundaries
This fixes a kernel panic on memcpy when
FORTIFY_SOURCE is enabled.
The initial smp implementation on commit aa7eb2bb4e
("arm: zynq: Add smp support")
used memcpy, which worked fine until commit ee333554fe
("ARM: 8749/1: Kconfig: Add ARCH_HAS_FORTIFY_SOURCE")
enabled overflow checks at runtime, producing a read
overflow panic.
The computed size of memcpy args are:
- p_size (dst): 4294967295 = (size_t) -1
- q_size (src): 1
- size (len): 8
Additionally, the memory is marked as __iomem, so one of
the memcpy_* functions should be used for read/write.
Fixes: aa7eb2bb4e ("arm: zynq: Add smp support")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add .arm directive to headsmp.S to ensure that the
CPU starts in 32-bit ARM mode and the correct code
size is copied on smp bring-up.
This is related to the fix applied to SoCFPGA by
commit 5616f36713
("ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel")
Additionally, start secondary CPUs on secondary_startup_arm
to automatically switch from ARM to thumb on a thumb kernel
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Mihawk BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.
Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
There are two PSU on i2c11. PSU0's address is 0x58, PSU1's address is
`0x59`, not `0x5a`.
Signed-off-by: John Wang <wangzqbj@inspur.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
DTS updates for the Gemini platform:
- Fix up some pin config confusion
- Use redboot partition parsing on the SL93512r
- Mount root on mtdblock3 by default
* tag 'gemini-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: gemini: Mount root from mtdblock3
ARM: dts: gemini: Switch to redboot partition parsing
ARM: dts: gemini: Fix up confused pin settings
Link: https://lore.kernel.org/r/CACRpkdarsQNfXgXMQKfYwOyiqhKY67gKd3ufQ+wexwO3v=LE5w@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT updates for v5.4, round 1
Highlights:
----------
MPU part:
-Add FMC2 NAND controller support on stm32mp157c-ev1.
-Add M4 remoteproc support:
-Add support in stm32mp157c.dtsi.
-Declare copro reserved memories region on stm32mp157 EV1 and DK1
boards.
-Enable M4 copro support on stm32mp157 EV1 and DK1.
-Add booster for ADC on stm32mp157c.
-Add audio codec support on stm32mp157 DK1.
MCU part:
-Remove fixed regulator unit address on stm32429i-eval used by ADC.
-Add missing vdd-supply required by ADC on stm32429i-eval and
stm32h743i-eval.
-Add pwm cells on f746 and f429.
* tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
ARM: dts: stm32: add syscfg to ADC on stm32mp157c
ARM: dts: stm32: add pwm cells to stm32f746
ARM: dts: stm32: add pwm cells to stm32f429
ARM: dts: stm32: add pwm cells to stm32mp157c
ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
ARM: dts: stm32: enable FMC2 NAND controller on stm32mp157c-ev1
ARM: dts: stm32: add FMC2 NAND controller pins muxing on stm32mp157c-ev1
ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
...
Link: https://lore.kernel.org/r/482a2a40-a246-6654-7e3b-8e38b137752f@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This are some DTS changes for the Ux500 for the v5.4 kernel cycle:
- Update the CoreSight blocks to use the latest and greatest
bindings
- Push the thermal driver config down to the main SoC DTSI
as it applies to all ASICs.
- Set a pull-up on the ST UIB right.
* tag 'ux500-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: set pull-up on STUIB STMPE IRQ line
ARM: dts: ux500: Fix up the thermal nodes
ARM: dts: ste: Update coresight DT bindings
Link: https://lore.kernel.org/r/CACRpkdbKX7a15SC-zwxmH_ygGzOKrn0h-pzzm22UpRcLRfRVNA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The DRM subsystem graphics drivers require more granular
definition of the connection between display drivers and
panels, and a proper panel compatible. This utilizes the
bindings merged to the DRM subsystem to properly define
the display on the NSPIRE devices.
We also do away with the undocumented DT binding
"lcd-type".
We add both the clocks to the CLCD block so the driver
have full control over its clocking.
Link: https://lore.kernel.org/r/20190810074230.6492-1-linus.walleij@linaro.org
Cc: Daniel Tang <dt.tangr@gmail.com>
Cc: Fabian Vogt <fabian@ritter-vogt.de>
Tested-by: Fabian Vogt <fabian@ritter-vogt.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Mark switch cases where we are expecting to fall through.
This patch fixes the following warnings:
arch/arm/plat-omap/dma.c: In function 'omap_set_dma_src_burst_mode':
arch/arm/plat-omap/dma.c:384:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if (dma_omap2plus()) {
^
arch/arm/plat-omap/dma.c:393:2: note: here
case OMAP_DMA_DATA_BURST_16:
^~~~
arch/arm/plat-omap/dma.c:394:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if (dma_omap2plus()) {
^
arch/arm/plat-omap/dma.c:402:2: note: here
default:
^~~~~~~
arch/arm/plat-omap/dma.c: In function 'omap_set_dma_dest_burst_mode':
arch/arm/plat-omap/dma.c:473:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if (dma_omap2plus()) {
^
arch/arm/plat-omap/dma.c:481:2: note: here
default:
^~~~~~~
Notice that, in this particular case, the code comment is
modified in accordance with what GCC is expecting to find.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This makes use of the am335x-osd335x-common.dtsi file that contains the
common device tree components for Octavo Systems AM335x System-in-
Package that is used on the BeagleBone Blue.
This has two minor side-effects:
1. pinmux_i2c0_pins is renamed to pinmux-i2c0-pins
2. the 1000MHz cpufreq operating point is enabled
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This allows to remove the console= entry in the kernel command line.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This property was never supported upstream. Get rid of it.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 4e27f752ab ("ARM: OMAP2+: Drop mmc platform data for am330x and
am43xx") dropped legacy mmc platform data for am3 and am4, but missed the
fact that we never updated the dts files for mmc3 that is directly on l3
interconnect instead of l4 interconnect. This leads to a situation with
no legacy platform data and incomplete dts data.
Let's update the mmc instances on l3 interconnect to probe properly with
ti-sysc interconnect target module driver to make mmc3 work again. Let's
still keep legacy "ti,hwmods" property around for v5.2 kernel and only
drop it later on.
Note that there is no need to use property status = "disabled" for mmc3.
The default for dts is enabled, and runtime PM will idle unused instances
just fine.
Fixes: 4e27f752ab ("ARM: OMAP2+: Drop mmc platform data for am330x and am43xx")
Reported-by: David Lechner <david@lechnology.com>
Tested-by: David Lechner <david@lechnology.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Non-serio path of Amstrad Delta FIQ deferred handler depended on
irq_ack() method provided by OMAP GPIO driver. That method has been
removed by commit 693de831c6 ("gpio: omap: remove irq_ack method").
Remove useless code from the deferred handler and reimplement the
missing operation inside the base FIQ handler.
Should another dependency - irq_unmask() - be ever removed from the OMAP
GPIO driver, WARN once if missing.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As seen on the AM335x TRM all the UARTs controller only are 0x1000 in size.
Fix this in the DTS.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have errata i688 workaround produce warnings on SoCs other than
omap4 and omap5:
omap4_sram_init:Unable to allocate sram needed to handle errata I688
omap4_sram_init:Unable to get sram pool needed to handle errata I688
This is happening because there is no ti,omap4-mpu node, or no SRAM
to configure for the other SoCs, so let's remove the warning based
on the SoC revision checks.
As nobody has complained it seems that the other SoC variants do not
need this workaround.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now with the varity of several RPi boards, the memory should be defined
at board level. This step gives us the chance to fix the memory size
of the RPi 1 B+, Zero (incl. W) and Compute Module 1.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
Starting with RPi 4 this is the first board, which doesn't use sdhost
as default SD interface. So the MMC interfaces should be defined finally at
board level. Since all boards using sdhci already does this, we can drop the
pinctrl part from bcm2835-rpi.dtsi.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Eric Anholt <eric@anholt.net>
Odroid-C1 uses the MAC address stored in eFuse at offset 0x1b4 (which is
defined as a "standard" offset for all Meson8 and Meson8b boards, but
testing shows that MXQ doesn't have the eFuse values programmed and
EC-100 stores it's MAC address in eMMC).
Add the nvmem cell which points to the MAC address and asssign it to the
Ethernet controller as "mac-address".
As result of this the MAC address which is stored in the eFuse is now
assigned to the Ethernet controller and consistent across reboots.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit removes the open-coded CPU-offline notification with new
common code. In particular, this change avoids calling scheduler code
using RCU from an offline CPU that RCU is ignoring. This is a minimal
change. A more intrusive change might invoke the cpu_check_up_prepare()
and cpu_set_state_online() functions at CPU-online time, which would
allow onlining throw an error if the CPU did not go offline properly.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
CAM power domain contains CAMIF, 3AA and FIMC LITE devices. It is present
only in Exynos 5422/5800 SoCs. Currently there are no drivers nor the
device nodes for those devices, but instantiating its power domain allows
to turn it off and save some energy.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add a power domain for G3D/Mali device present in Exynos542x/5800 SoCs.
Node for the Mali device will be added by a separate patch.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
DT nodes should be sorted by 'reg' property, so move MSC power domain
node in exynos5420.dtsi to the end of power domains to keep them sorted.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The dma_mask and coherent_dma_mask values were never set.
This prevented the media omap_vout driver from loading successfully.
Tested on a Pandaboard and Beagle XM board.
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Move the native-mode property inside the display-timings node.
According to
Documentation/devicetree/bindings/display/panel/display-timing.txt.
native-mode is a property of the display-timings node.
If it's located outside of display-timings, the native-mode setting is
ignored and the first display timing is used (which is a problem only if
someone adds another display timing).
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The driver uses hardwire MMIO addresses instead of the data
that is passed in device tree. Change it over to only
hardcode the register offset values and allow compile-testing.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
