Commit Graph

58539 Commits

Author SHA1 Message Date
Andrey Smirnov
b14c872eeb ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as "ipg" clock to SDMA
Since 25aaa75df1 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality(this at least
breaks RAVE SP serdev driver on RDU2). Fix the code to specify
IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect
clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:27:11 +08:00
Rui Miguel Silva
e345fd4249 ARM: dts: imx7s-warp: add ov2680 sensor node
Warp7 comes with a Omnivision OV2680 sensor, add the node here to make
complete the camera data path for this system. Add the needed regulator
to the analog voltage supply, the port and endpoints in mipi_csi node
and the pinctrl for the reset gpio.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:47 +08:00
Rui Miguel Silva
2cd37a97d1 ARM: dts: imx7s-warp: add csi and mipi_csi node
Add and enable csi and mipi_csi nodes.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:34 +08:00
Rui Miguel Silva
6a2736fccf ARM: dts: imx7s: Add video mux, csi and mipi_csi
Add device tree nodes for csi, video multiplexer and mipi-csi.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:18 +08:00
Rui Miguel Silva
94a905a79f ARM: dts: imx7s: add multiplexer controls
The IOMUXC General Purpose Register has bitfield to control video bus
multiplexer to control the CSI input between the MIPI-CSI2 and parallel
interface. Add that register and mask.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:15 +08:00
Rui Miguel Silva
8137474b9d ARM: dts: imx7s: add mipi phy power domain
Add power domain index 0 related with mipi-phy to imx7s.

While at it rename pcie power-domain node to remove pgc prefix.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 10:23:02 +08:00
Bruno Thomsen
684a586741 ARM: dts: tq imx7d board support
This adds support for the TQ TQMa7D SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Dual SoC.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:07 +08:00
Bruno Thomsen
c924f0c07e ARM: dts: tq imx7s board support
This adds support for the TQ TQMa7S SoM together with
the MBa7 carrier board and it's based on the NXP i.MX7Solo SoC.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:07 +08:00
Bruno Thomsen
a80a1af6ec ARM: dts: tq imx7 common board support
This adds TQMa7 and MBa7 board support.
TQMa7 can be mounted with either i.MX7 Solo or Dual.
All TQMa7 board variants can be mounted in MBa7 carrier board.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:29:06 +08:00
Krzysztof Kozlowski
8cc76b1c75 ARM: dts: exynos: Remove console argument from bootargs
Remove the "console=ttySAC..." argument from DTSes having a proper
stdout-path property.  To make the code functionally equivalent, add the
serial port baud rate and parity.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10 18:13:31 +02:00
Krzysztof Kozlowski
06d5360946 ARM: dts: exynos: Use stdout-path property instead of console in bootargs
Replacing bootargs with stdout-path property in chosen node allows using
early console by adding just 'earlycon' parameter to the kernel command
line.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-04-10 18:13:05 +02:00
Tony Lindgren
35667d812c Merge branch 'omap-for-v5.2/am4-ddr3' into omap-for-v5.2/am4-pm-v2 2019-04-10 09:06:01 -07:00
Marek Szyprowski
2997520c2d ARM: exynos: Set MCPM as mandatory for Exynos542x/5800 SoCs
Support for Exynos5420/5422/5800 SoCs requires MCPM to properly boot all
CPU cores on all currectly supported platforms: Peach Pit (Exynos5420),
Odroid XU3/XU3lite/XU4/HC1 (Exynos5422) and Peach Pi (Exynos5800).
Without it some CPU cores fail to come online. Remove then the ability to
disable MCPM and make it mandatory when Exynos542x/5800 support is
enabled.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-04-10 17:58:22 +02:00
Maxime Ripard
22f88e3113 ARM: dts: sun5i: Add the MBUS controller
The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.

Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.

One of the most notable thing is that instead of having the same mapping
for the RAM than the CPU, it maps it at address 0, which means we'll have
to do address translation thanks to the dma-ranges property.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-10 16:32:25 +02:00
Thierry Reding
c8e7755ec6 ARM: tegra: Sort dependencies alphabetically
The list of dependencies has become unsorted, which makes it difficult
to find the right place to insert new dependencies. Restore alphabetical
order to make future additions easier.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-10 10:17:47 +02:00
Ingo Molnar
54bbfe75cb Merge branch 'linus' into locking/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-04-10 09:14:42 +02:00
Christian Lamparter
f3e35357cd ARM: dts: qcom: ipq4019: enlarge PCIe BAR range
David Bauer reported that the VDSL modem (attached via PCIe)
on his AVM Fritz!Box 7530 was complaining about not having
enough space in the BAR. A closer inspection of the old
qcom-ipq40xx.dtsi pulled from the GL-iNet repository listed:

| qcom,pcie@80000 {
|	compatible = "qcom,msm_pcie";
|	reg = <0x80000 0x2000>,
|	      <0x99000 0x800>,
|	      <0x40000000 0xf1d>,
|	      <0x40000f20 0xa8>,
|	      <0x40100000 0x1000>,
|	      <0x40200000 0x100000>,
|	      <0x40300000 0xd00000>;
|	reg-names = "parf", "phy", "dm_core", "elbi",
|			"conf", "io", "bars";

Matching the reg-names with the listed reg leads to
<0xd00000> as the size for the "bars".

Cc: stable@vger.kernel.org
BugLink: https://www.mail-archive.com/openwrt-devel@lists.openwrt.org/msg45212.html
Reported-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 23:33:39 -05:00
Brian Masney
05d86a0ae8 ARM: dts: qcom: pma8084: add gpio-ranges
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.

This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 23:25:55 -05:00
Brian Masney
546f72e7ec ARM: dts: qcom: msm8660: add gpio-ranges
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.

This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 23:25:55 -05:00
Brian Masney
3bc5163ebb ARM: dts: qcom: mdm9615: add gpio-ranges
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.

This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 23:25:55 -05:00
Brian Masney
33984dd6c4 ARM: dts: qcom: apq8064: add gpio-ranges
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.

This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 23:25:55 -05:00
Brian Masney
acd92c5a11 ARM: qcom_defconfig: add options for LG Nexus 5 phone
Add wcn36xx wireless, msm vibrator, pm8941 power key, bq24190 charger,
spmi-iadc, spmi-vadc, mpu6515 gyroscope / accelerometer, and tsl2772
proximity / light drivers as modules to support the LG Nexus 5
(hammerhead) phone.

CFG80211 is changed to be a module to match MAC80211 since this isn't
required for initial bootup.

Device manager support is also added as a module since this is needed by
postmarketOS.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09 22:37:39 -05:00
Tony Lindgren
b2770b2d6f ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap5
We can now add l4 abe interconnect hierarchy and ti-sysc data with
ti-sysc driver supporting external optional clocks needed by mcpdm.

This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.

Note that mcpdm we now need to enable at module level only for devices
that have the external pdmclk wired from the PMIC as the clock is
needed for the module to be accessible.

Also note that abe seems to be the same as on omap4 except for domains
and clocks and we may be able to combine the l4 abe data later on.
But let's play it safe and just initially use what we have already
defined in the platform data.

Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 09:00:54 -07:00
Tony Lindgren
5b59753129 ARM: dts: Add l4 abe interconnect hierarchy and ti-sysc data for omap4
We can now add l4 abe interconnect hierarchy and ti-sysc data with
ti-sysc driver supporting external optional clocks needed by mcpdm.

This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.

Note that mcpdm we now need to enable at module level only for devices
that have the external pdmclk wired from the PMIC as the clock is
needed for the module to be accessible.

Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 09:00:53 -07:00
Tony Lindgren
ed01ffd9dd ARM: dts: Add common mcpdm dts file for omap4
The mcpdm module found on omap4 and 5 needs pdmclk clock from
the pmic that may or may not be wired. Without this clock we
cannot read the registers for mcpdm at all. For the external
mcpdm clock to work, it needs to be muxed at the module level
for ti-sysc driver probe to mux it early enough for probe.

Let's set up a common file for it to make things a bit easier
to make l4 abe interconnect to probe with ti-sysc driver. Note
that this is not needed for omap5 as we can just update mcpdm
muxing in omap5-board-common.dtsi in later patches.

Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 09:00:53 -07:00
Dave Gerlach
11140cc40d ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume path
When returning from DeepSleep mode on AM437x platforms the EMIF must run
DDR hardware leveling, same as done during u-boot, to properly restore the
EMIF PHY to it's operational state on platforms using DDR3.

Call the ti-emif-sram-pm run_hw_leveling routine to perform this. This
happens after all other EMIF values are restored so the exact same
configuration used at boot is used at the end of EMIF resume as well.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:32:12 -07:00
Andrew F. Davis
b453c41760 ARM: dts: omap2420-n810: Use new CODEC reset pin name
The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:09:42 -07:00
Kabir Sahane
72aff4ecf1 ARM: OMAP2+: pm33xx-core: Do not Turn OFF CEFUSE as PPA may be using it
This area is used to store keys by HSPPA in case of AM438x SOC. Leave it
active.

Signed-off-by: Kabir Sahane <x0153567@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:05:17 -07:00
Andrew F. Davis
f8033678c6 ARM: OMAP2+: Wakeupgen: AM43xx HS devices should save context like non-HS
Unlike some previous generation devices, AM43xx HS IRQ and Wakegen
context is handled by the ROM for us, and no secure service call
is needed or supported. Non-GP AM43xx devices should take the
same path as GP.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:05:16 -07:00
Andrew F. Davis
e74cf9186b ARM: dts: am43xx-epos-evm: Add matrix keypad as wakeup source
Mark matrix-keypad as a wakeup source.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:01:36 -07:00
Mike Erdahl
177425ef58 ARM: dts: am43xx-epos-evm: Keep DCDC3 regulator on in suspend to memory
When going to suspend to ram mode (or rtc-only mode), the DDR regulator
must be told to stay on, else this rail will go down when the PMIC_EN
signal is deasserted.

Signed-off-by: Mike Erdahl <m-erdahl@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:01:35 -07:00
Kabir Sahane
d921e53a51 ARM: dts: am43xx-epos-evm: Keep DCDC5 and DCDC6 always on
These regulator outputs are needed even in deep sleep modes to prevent
low-voltage detection events. Make these always ON to avoid this.

Signed-off-by: Kabir Sahane <x0153567@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 08:01:34 -07:00
Kishon Vijay Abraham I
b5acec09e2 ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable
PCIe x2 lane mode are added here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09 07:59:12 -07:00
Dmitry Osipenko
78ee399f16 ARM: tegra: Add firmware calls required for suspend-resume on Tegra30
In order to suspend-resume CPU with Trusted Foundations firmware being
present on Tegra30, the LP1/LP2 boot vectors and CPU caches need to be
set up using the firmware calls and then suspend code shall avoid
re-disabling parts that were disabled by the firmware.

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:29 +02:00
Dmitry Osipenko
dae84be59d ARM: tegra: Always boot CPU in ARM-mode
CPU always jumps into reset handler in ARM-mode from the Trusted
Foundations firmware, hence let's make CPU to always jump into kernel
in ARM-mode regardless of the firmware presence. This is required to
make Thumb-2 kernel working with the Trusted Foundations firmware on
Tegra30.

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:25 +02:00
Dmitry Osipenko
2af6597ac3 ARM: tegra: Don't apply CPU erratas in insecure mode
CPU isn't allowed to touch secure registers while running under secure
monitor. Hence skip applying of CPU erratas in the reset handler if
Trusted Foundations firmware presents.

Partially based on work done by Michał Mirosław [1].

[1] https://www.spinics.net/lists/arm-kernel/msg594768.html

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:24 +02:00
Dmitry Osipenko
6ad27b8350 ARM: tegra: Set up L2 cache using Trusted Foundations firmware
On Tegra30 L2 cache should be initialized using firmware call if CPU
is running in insecure mode. Set up the required outer-cache write_sec()
callback early during boot using the firmware API, it is always a NO-OP
on T114+ and is NO-OP on T20/30 if Trusted Foundations firmware node
isn't present in device-tree.

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:23 +02:00
Dmitry Osipenko
ebc7c1a265 ARM: trusted_foundations: Provide information about whether firmware is registered
Add a helper that provides information about whether Trusted Foundations
firmware operations have been registered.

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:22 +02:00
Dmitry Osipenko
96446e21d6 ARM: trusted_foundations: Make prepare_idle call to take mode argument
The Trusted Foundations firmware call varies depending on the required
suspend-mode. Make the firmware API to take the mode argument in order
to expose all of the modes to firmware user.

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:19 +02:00
Dmitry Osipenko
ebca2a6ee1 ARM: trusted_foundations: Support L2 cache maintenance
Implement L2 cache initialization firmware callback that should be
invoked early during boot in order to set up the required outer cache
driver's callbacks and add the callback required for L2X0 maintenance.

Partially based on work done by Michał Mirosław [1].

[1] https://www.spinics.net/lists/arm-kernel/msg594765.html

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-09 16:36:16 +02:00
Marek Szyprowski
98a3308ea8 ARM: exynos: Fix infinite loops on CPU powerup failure
Add timeout to infinite loops during the CPU powerup procedures. It
is better to report an error instead of busylooping for infinite time
in case of failure.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-04-09 15:07:33 +02:00
Sakari Ailus
d75f773c86 treewide: Switch printk users from %pf and %pF to %ps and %pS, respectively
%pF and %pf are functionally equivalent to %pS and %ps conversion
specifiers. The former are deprecated, therefore switch the current users
to use the preferred variant.

The changes have been produced by the following command:

	git grep -l '%p[fF]' | grep -v '^\(tools\|Documentation\)/' | \
	while read i; do perl -i -pe 's/%pf/%ps/g; s/%pF/%pS/g;' $i; done

And verifying the result.

Link: http://lkml.kernel.org/r/20190325193229.23390-1-sakari.ailus@linux.intel.com
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: sparclinux@vger.kernel.org
Cc: linux-um@lists.infradead.org
Cc: xen-devel@lists.xenproject.org
Cc: linux-acpi@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: drbd-dev@lists.linbit.com
Cc: linux-block@vger.kernel.org
Cc: linux-mmc@vger.kernel.org
Cc: linux-nvdimm@lists.01.org
Cc: linux-pci@vger.kernel.org
Cc: linux-scsi@vger.kernel.org
Cc: linux-btrfs@vger.kernel.org
Cc: linux-f2fs-devel@lists.sourceforge.net
Cc: linux-mm@kvack.org
Cc: ceph-devel@vger.kernel.org
Cc: netdev@vger.kernel.org
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: David Sterba <dsterba@suse.com> (for btrfs)
Acked-by: Mike Rapoport <rppt@linux.ibm.com> (for mm/memblock.c)
Acked-by: Bjorn Helgaas <bhelgaas@google.com> (for drivers/pci)
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Petr Mladek <pmladek@suse.com>
2019-04-09 14:19:06 +02:00
Anshuman Khandual
14b94d0757 KVM: ARM: Remove pgtable page standard functions from stage-2 page tables
ARM64 standard pgtable functions are going to use pgtable_page_[ctor|dtor]
or pgtable_pmd_page_[ctor|dtor] constructs. At present KVM guest stage-2
PUD|PMD|PTE level page tabe pages are allocated with __get_free_page()
via mmu_memory_cache_alloc() but released with standard pud|pmd_free() or
pte_free_kernel(). These will fail once they start calling into pgtable_
[pmd]_page_dtor() for pages which never originally went through respective
constructor functions. Hence convert all stage-2 page table page release
functions to call buddy directly while freeing pages.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Yu Zhao <yuzhao@google.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-04-09 11:21:50 +01:00
Chen-Yu Tsai
013df97be4 ARM: dts: sun8i: a83t: Add I2C2 pinmux setting for PE pins
I2C2 is available on the PE pingroup, on the same pins as the camera
sensor interface (CSI) controller's camera control interface pins.
This provides an option to use I2C2 instead of that control interface
to configure camera sensors.

Add a pinctrl node for it. The property /omit-if-no-ref/ is added to
keep the device tree blob size down if it is unused.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09 09:58:24 +02:00
Ondrej Jirman
5824c8ebb9 ARM: dts: sun8i: tbs-a711: Add support for volume keys input
TBS A711 tablet has volume up/down keys connected to r_lradc. Add
support for these keys.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09 09:43:04 +02:00
Ziping Chen
d6212ce3fc ARM: dts: sunxi: Add R_LRADC support for A83T
Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC.
Now the driver has been modified to support it.

Add support for it.

Signed-off-by: Ziping Chen <techping.chan@gmail.com>
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-04-09 09:42:55 +02:00
Keerthy
44c22a2d12 ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh mode
Add support for rtc+ddr in self refresh mode. Add addtional
pm hooks for save/restore and rtc suspend/resume.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:39:01 -07:00
Tony Lindgren
d80caf9516 ARM: OMAP2+: Drop mcspi platform data for omap4
We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:10:59 -07:00
Tony Lindgren
fbf3b4b9f4 ARM: OMAP2+: Drop uart platform data for dra7
We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:10:59 -07:00
Tony Lindgren
19326ef5d5 ARM: OMAP2+: Drop gpio platform data for dra7
We can now drop legacy platform data one interconnect target module at
a time in favor of the device tree based data that has been added earlier.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08 10:10:59 -07:00