Pull regulator updates from Mark Brown:
"The biggest chunk of the regulator changes for this release outside of
the new drivers is the conversion of the fixed regulator to use the
GPIO descriptor API, there's a small addition to the GPIO API plus a
bunch of updates to board files to implement it. This is some really
welcome work from Linus Walleij that's had a bunch of review and has
been sitting in -next for a while so I'm fairly happy there's no major
issues.
- Helpers for overlapping linear ranges.
- Display opmode and consumer requested load in the regualtor_summary
file in debugfs, plus a fix there.
- Support for the fun and entertaining power off mechanism that the
pfuze100 hardware implements.
- Conversion of the fixed regulator API to use GPIO descriptors,
including pulling in a bunch of patches to a bunch of board files.
- New drivers for Cirrus Logic Lochnagar, Qualcomm PMS405, Rohm
BD71847, ST PMIC1, and TI LM363x devices"
* tag 'regulator-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (36 commits)
regulator: lochnagar: Use a consisent comment style for SPDX header
regulator: bd718x7: Remove struct bd718xx_pmic
regulator: Fetch enable gpiods nonexclusive
regulator/gpio: Allow nonexclusive GPIO access
regulator: lochnagar: Add support for the Cirrus Logic Lochnagar
regulator: stpmic1: Return REGULATOR_MODE_INVALID for invalid mode
regulator: stpmic1: add stpmic1 regulator driver
dt-bindings: regulator: document stpmic1 pmic regulators
regulator: axp20x: Mark expected switch fall-throughs
regulator: bd718xx: fix build warning on x86_64
regulator: fixed: Default enable high on DT regulators
regulator: bd718xx: rename bd71837 to 718xx
regulator: bd718XX use pickable ranges
regulator/mfd: bd718xx: rename bd71837/bd71847 common instances
regulator: Support regulators where voltage ranges are selectable
mfd: dt bindings: add BD71847 device-tree binding documentation
regulator: dt bindings: add BD71847 device-tree binding documentation
regulator/mfd: Support ROHM BD71847 power management IC
regulator: da905{2,5}: Remove unnecessary array check
regulator: qcom: Add PMS405 regulators
...
Pull spi updates from Mark Brown:
"One new core feature here, a small collection of new drivers and a
bunch of small improvements in existing drivers:
- A new CS_WORD flag for transfers where the chip select is toggled
at every word, with both a generic implementation and the ability
for controllers to do this automatically (including a DaVinci one).
- New drivers for Mediatek MT2712, Qualcomm GENI and QSPI, Spreadtrum
SPI and ST STM32 QSPI plus new IDs for several existing ones"
* tag 'spi-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (86 commits)
spi: lpspi: add imx8qxp compatible string
spi: Allow building SPI_BCM63XX_HSSPI on ARM-based SoCs
spi: omap2-mcspi: Add slave mode support
spi: omap2-mcspi: Set FIFO DMA trigger level to word length
spi: omap2-mcspi: Switch to readl_poll_timeout()
spi: spi-mem: add stm32 qspi controller
dt-bindings: spi: add stm32 qspi controller
spi: sh-msiof: document R8A779{7|8}0 bindings
spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherent
MAINTAINERS: Add entry for Broadcom SPI controller
spi: sh-msiof: fix deferred probing
spi: imx: use PIO mode if size is small
spi: imx: correct wml as the last sg length
spi: imx: move wml setting to later than setup_transfer
PCI: Provide pci_match_id() with CONFIG_PCI=n
spi: Make GPIO CSs honour the SPI_NO_CS flag
spi/spi-pxa2xx: add PXA2xx SSP SPI Controller
spi: pxa2xx: Add devicetree support
spi: pxa2xx: Use an enum for type
spi: spi-geni-qcom: Add SPI driver support for GENI based QUP
...
Pull hwmon updates from Guenter Roeck:
- Add support for trace events to hwmon core
- Add support for NCT6797D, NCT6798D, MAX31725/6, LTM4686
- Support all AMD Family 15h Model 6xh and Model 7xh processors in
k10temp driver
- Convert ina3221 driver to _info API
- Fixes, cleanups, and improvements in various drivers
* tag 'hwmon-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (46 commits)
hwmon: (pmbus) Fix page count auto-detection.
hwmon: (pmbus) remove redundant 'default n' from Kconfig
hwmon: (core) Add trace events to _attr_show/store functions
hwmon: (ina3221) Use _info API to register hwmon device
hwmon: (npcm-750-pwm-fan) Change initial pwm target to 255
hwmon: (ina3221) Validate shunt resistor value from DT
hwmon: (tmp421) make const array 'names' static
hwmon: (core) Add hwmon_in_enable attribute
hwmon: (ina3221) mark PM functions as __maybe_unused
hwmon: (ina3221) Read channel input source info from DT
dt-bindings: hwmon: Add ina3221 documentation
hwmon: (ina3221) Add suspend and resume functions
hwmon: (ina3221) Fix INA3221_CONFIG_MODE macros
hwmon: (ina3221) Add INA3221_CONFIG to volatile_table
MAINTAINERS: Update PMBUS maintainer entry
hwmon: (pwm-fan) Set fan speed to 0 on suspend
hwmon: (pwm-fan) Silence error on probe deferral
hwmon: (scpi-hwmon) remove redundant continue
hwmon: (nct6775) Add support for NCT6798D
hwmon: (nct6775) Add support for NCT6797D
...
- Quirk Keystone K2G to limit MRRS to 256 (Kishon Vijay Abraham I)
- Update Keystone to use MRRS quirk for host bridge instead of open
coding (Kishon Vijay Abraham I)
- Refactor Keystone link establishment (Kishon Vijay Abraham I)
- Simplify and speed up Keystone link training (Kishon Vijay Abraham I)
- Remove unused Keystone host_init argument (Kishon Vijay Abraham I)
- Merge Keystone driver files into one (Kishon Vijay Abraham I)
- Remove redundant Keystone platform_set_drvdata() (Kishon Vijay Abraham
I)
- Rename Keystone functions for uniformity (Kishon Vijay Abraham I)
- Add Keystone device control module DT binding (Kishon Vijay Abraham I)
- Use SYSCON API to get Keystone control module device IDs (Kishon Vijay
Abraham I)
- Clean up Keystone PHY handling (Kishon Vijay Abraham I)
- Use runtime PM APIs to enable Keystone clock (Kishon Vijay Abraham I)
- Clean up Keystone config space access checks (Kishon Vijay Abraham I)
- Get Keystone outbound window count from DT (Kishon Vijay Abraham I)
- Clean up Keystone outbound window configuration (Kishon Vijay Abraham
I)
- Clean up Keystone DBI setup (Kishon Vijay Abraham I)
- Clean up Keystone ks_pcie_link_up() (Kishon Vijay Abraham I)
- Fix Keystone IRQ status checking (Kishon Vijay Abraham I)
- Add debug messages for all Keystone errors (Kishon Vijay Abraham I)
- Clean up Keystone includes and macros (Kishon Vijay Abraham I)
* remotes/lorenzo/pci/keystone:
PCI: keystone: Cleanup macros defined in pci-keystone.c
PCI: keystone: Reorder header file in alphabetical order
PCI: keystone: Add debug error message for all errors
PCI: keystone: Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status
PCI: keystone: Cleanup ks_pcie_link_up()
PCI: keystone: Cleanup set_dbi_mode() and get_dbi_mode()
PCI: keystone: Cleanup outbound window configuration
PCI: keystone: Get number of outbound windows from DT
PCI: keystone: Cleanup configuration space access
PCI: keystone: Invoke runtime PM APIs to enable clock
PCI: keystone: Cleanup PHY handling
PCI: keystone: Use SYSCON APIs to get device ID from control module
dt-bindings: PCI: keystone: Add bindings to get device control module
PCI: keystone: Use uniform function naming convention
PCI: keystone: Remove redundant platform_set_drvdata() invocation
PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.c
PCI: keystone: Remove unused argument from ks_dw_pcie_host_init()
PCI: keystone: Do not initiate link training multiple times
PCI: keystone: Move dw_pcie_setup_rc() out of ks_pcie_establish_link()
PCI: keystone: Use quirk to set MRRS for PCI host bridge
PCI: keystone: Use quirk to limit MRRS for K2G
This patch adds the documentation of device tree bindings
for the STM32 QSPI controller. It is a specialized communication
interface targeting single, dual or quad SPI Flash memories (NOR/NAND).
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add clocks properties to cs42l51 Cirrus codec,
to support master clock provider.
Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- Hisilicon 3670 SoC support
* clk-samsung:
dt-bindings: clock: samsung: Add SPDX license identifiers
clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
clk: samsung: exynos5420: Enable PERIS clocks for suspend
clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend
clk: samsung: Remove obsolete code for Exynos4412 ISP clocks
clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs
clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
clk: samsung: exynos5420: Use generic helper for handling suspend/resume
clk: samsung: exynos4: Use generic helper for handling suspend/resume
clk: samsung: Add support for setting registers state before suspend
clk: samsung: exynos5250: Use generic helper for handling suspend/resume
clk: samsung: s5pv210: Use generic helper for handling suspend/resume
clk: samsung: s3c64xx: Use generic helper for handling suspend/resume
clk: samsung: s3c2443: Use generic helper for handling suspend/resume
clk: samsung: s3c2412: Use generic helper for handling suspend/resume
clk: samsung: s3c2410: Use generic helper for handling suspend/resume
clk: samsung: Remove excessive include
* clk-hisi3670:
clk: hisilicon: Add clock driver for Hi3670 SoC
dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk
* clk-at91-div-0:
clk: at91: Fix division by zero in PLL recalc_rate()
The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. Documenting
the bindings here.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The STA32x chips feature an XTI clock input that needs to be stable before
the reset signal is released. Therefore, the chip driver needs to get a
handle to the clock. Instead of relying on other parts of the system to
enable the clock, let the codec driver grab a handle itself.
In order to keep existing boards working, clock support is made optional.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
One Laptop Per Child is a non-profit that produced the XO series of
eductional laptops for children.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Rob Herring <robh@kernel.org>
Document the new PMC binding with only one PMC node for all the PMC clocks
instead of one node per clock as this proved to be problematic.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The internal codec on Allwinner A64 is split into 2 parts. The
analog path controls are routed through an embedded custom register
bus accessed through the PRCM block just as on A23/A33/H3.
Add a binding for this hardware.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The I2S block used for the audio codec in the A64 differs from other 3
I2S modules in A64 and isn't compatible with H3. But it is very similar
to what is found in A10(sun4i). However, its TX FIFO is
located at a different address.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add bindings to get device control module which has the device id and
vendor id to be configured in the keystone PCIe controller.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
This is better than letting the other developers wondering what are the
supported strings.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add the clocks supported in global clock controller which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.
Signed-off-by: Shefali Jain <shefjain@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
[bamse, vkoul: rebase and tidyup for upstream]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Lowercase hex]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add support for the global clock controller found on SDM660
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Based on CAF implementation.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
[craig: rename parents to fit upstream, and other cleanups]
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of
defines to avoid duplicates]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add a new compatible string "ti,am654-ecap" to support PWM ECAP IP of
TI AM654 SoC.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or
"Central Resource Unit") registers. There are more CRU registers and
functions so CRU should be represented as a separated block in DT.
Moreover CRU is a sub-block of DMU ("Device Management Unit") so that
one should also get its own node.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
