This patch adds CTU (Channel Transfer Unit) support for rsnd driver.
But, it does nothing to data at this point, but is required for MIX
support.
CTU design is a little different from other IPs (CTU0 is including
CTU00 - CTU03, and CTU1 is including CTU10 - CTU13, these have different
register mapping) We need to care about it on this driver.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add documentation for configuration and timing setup of
static memory devices on the ARM PL172 controller.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Rockchip dts changes for 4.3, part1" from Heiko Stuebner:
This adds the board for the Netxeon R89 used in different TV-boxes and
the initial support for two Chromebooks from the veyron family.
Additionally a non-critical fix for the watchdog irq on rk3288, addition
of the gmac reset line, a ramp delay for the cpu regulator on the firefly
board and cpu affinity for the arm-pmu spi irqs.
* tag 'v4.3-rockchip32-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add rk3288 arm-pmu irq affinity
dt-bindings: document rk3368 R88 board from Rockchip
ARM: dts: rockchip: add missing device_type = "memory" to boards
ARM: dts: rockchip: add veyron-pinky board
ARM: dts: rockchip: add veyron-jerry board
ARM: dts: rockchip: add shared rk3288-veyron files
ARM: dts: Add sbs-battery dts fragment used by chromebooks
ARM: dts: rockchip: add Netxeon R89 board
dt-bindings: add vendor prefix for Netxeon Technology
ARM: dts: rockchip: fix rk3288 watchdog irq
ARM: dts: rockchip: Add ramp delay for vdd_cpu in firefly board dts
ARM: dts: rockchip: Add STMMAC reset signal in GMAC interface for rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: mvebu: dt changes for v4.3" from Gregory Clement:
mvebu dt changes for v4.3 (part #1)
- Update Armada 388 GP description
- Add Buffalo Linkstation LS-WXL and LS-WSXL
- Fine-tune the L2 configuration for cortex A9 based SoC
- Update XOR definition for Armada 38x and 39x SoC
* tag 'mvebu-dt-4.3-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update EEPROM description of Armada 388 GP
ARM: mvebu: fix description of pwr-sata0 regulator on Armada 388 GP
ARM: dts: add buffalo linkstation ls-wvl/vl
ARM: dts: add buffalo linkstation ls-wxl/wsxl
ARM: mvebu: use DT properties to fine-tune the L2 configuration
ARM: mvebu: use armada-380-xor on Armada 38x and 39x
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "LPC18xx DTS changes for 4.3" from Joachim Eastwood:
This patch set adds DT nodes for all the drivers that went upstream in
4.2 and should represent the bulk of DTS changes for 4.3. All nodes
added are documented and some of patches carries a ack from subsystem
maintainer. It also features updates to the EA4357 dev- kit and a new
board from Ezequiel Garcia.
Note that there might be one more batch of DTS changes for 4.3 if any
new drivers goes upstream and also some changes for the Hitex eval board
might come.
* 'lpc18xx_43xx_dts_4.3' of https://github.com/manabian/linux-lpc:
ARM: dts: add DT for CIAA LPC4337 industrial computer
of: add vendor prefix for CIAA project
ARM: dts: lpc4357-ea4357: add uart3
ARM: dts: lpc4357-ea4357: add ethernet
ARM: dts: lpc4357-ea4357: add gpio joystick
ARM: dts: lpc4357-ea4357: add mmcsd
ARM: dts: lpc4357-ea4357: add pinctrl and uart0 muxing
ARM: dts: lpc18xx: add usb nodes
ARM: dts: lpc18xx: add ethernet node
ARM: dts: lpc18xx: add creg (syscon) node
ARM: dts: lpc18xx: add mmcsd node
ARM: dts: lpc18xx: add can nodes
ARM: dts: lpc18xx: add ssp nodes
ARM: dts: lpc18xx: add gpio node
ARM: dts: lpc18xx: add pinctrl node
ARM: dts: lpc18xx: add uart new compat string and clk names
ARM: dts: lpc18xx: add cgu and ccu clock-controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
The "function" of the MPP driver was inherited from the GPIO driver, but the
differences between the two hardware blocks makes both the driver and the
device tree binding to be awkward.
Instead of overloading the "normal" function with various modes this patch
transposes the pinmux function to represent the three operating modes of the
MPP (digital, analog and current sink). The properties of pin pairing and DTEST
routing is moved to separate properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When the MPP is configured for analog output the output level is selected by
the AOUT_CTL register, this patch makes it possible to control this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linux 4.2-rc2
We need to backport changeset 31f0245545, with fixes a bug at
include/linux/compiler.h that breaks sparse.
* tag 'v4.2-rc2': (221 commits)
Linux 4.2-rc2
Revert "drm/i915: Use crtc_state->active in primary check_plane func"
freeing unlinked file indefinitely delayed
fix a braino in ovl_d_select_inode()
9p: don't leave a half-initialized inode sitting around
tick/broadcast: Prevent NULL pointer dereference
selinux: fix mprotect PROT_EXEC regression caused by mm change
parisc: Fix some PTE/TLB race conditions and optimize __flush_tlb_range based on timing results
stifb: Implement hardware accelerated copyarea
nfit: add support for NVDIMM "latch" flag
nfit: update block I/O path to use PMEM API
tools/testing/nvdimm: add mock acpi_nfit_flush_address entries to nfit_test
tools/testing/nvdimm: fix return code for unimplemented commands
tools/testing/nvdimm: mock ioremap_wt
pmem: add maintainer for include/linux/pmem.h
Revert "Input: synaptics - allocate 3 slots to keep stability in image sensors"
arm64: entry32: remove pointless register assignment
MIPS: O32: Use compat_sys_getsockopt.
MIPS: c-r4k: Extend way_string array
MIPS: Pistachio: Support CDMM & Fast Debug Channel
...
imx-drm: fixes for parallel-display, imx-tve, and ipu-common
These patches fix the parallel-display driver to use the standard OF
graph bindings for connecting a drm_panel via device tree instead of
an undocumented, driver specific device tree property, take care to
disable all IPU interrupts before setting up the irq chip to fix a
kexec lockup, and fix VGA output on i.MX53-QSB boards by correcting
the media bus format set by the imx-tve driver.
* tag 'imx-drm-fixes-2015-07-14' of git://git.pengutronix.de/git/pza/linux:
drm/imx: tve: fix media bus format for VGA output
GPU: ipu: fix lockup caused by pending chained interrupts
drm/imx: parallel-display: fix drm_panel support
This patch adds documentation for the ZTE ZX296702 SoC DMA device
DTS binding.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
While pinky was one of the earlier development models, is on the list
of endangered species today and nearly extinct, I want to keep mine
around for the foreseeable future after spending all the time making a
nice hole into the base below the dut-connector.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The "function", "pins" and "groups" pinmux and pinctrl properties have
been standardized. Support them in addition to the custom "renesas,*"
properties. New-style and old-style properties can't be mixed in DT.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The example in the device tree binding documentation and the driver code
list hda2codec_2x as the last entry in the clock-names and reset-names
properties. Update the description of the properties to use the same
order.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix hda2codec_2x clock and reset names in Tegra30 HDA controller device
tree node documentation. While at it also fix coma vs. semicolon issue.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The MPP supports three modes; digital, analog and sink mode. This patch
implements support for the latter.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The cpufreq driver for Tegra124 will be a different one than the old
Tegra20 cpufreq driver (tegra-cpufreq), which does not use the device
tree.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The DFLL is the main clocksource for the fast CPU cluster on Tegra124
and also provides automatic CPU rail voltage scaling as well. The DFLL
is a separate IP block from the usual Tegra124 clock-and-reset
controller, so it gets its own node in the device tree.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some brcmstb GPIO controllers can be used to wake from suspend, so use
the de facto standard property 'wakeup-source' to mark the nodes of
controllers with that capability.
Also document interrupts-extended, which will be used for wakeup
handling because the interrupt parent for the wake IRQ is different
from the regular IRQ.
While we're at it, a few more fixes: We don't actually use the
"interrupt-names" property, so remove it from the listed optional
properties and from the examples. And since we're modifying the
examples, also follow Brian's suggestions to:
- change #gpio-cells, #interrupt-cells, and brcm,gpio-bank-widths from
hex to dec
- use phandles
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The snvs-pwrkey is designed to enable POWER key function which controlled
by SNVS ONOFF. the driver can report the status of POWER key and wakeup
system if pressed after system suspend.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
snvs actually is multi fucntion driver.
Change to use syscon to access register.
Change snvs parent interrupt to option because single function
may have seperated irq number.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This board is used in some TV-boxes like for example the Beelink R89 or
Tronsmart R28.
The board itself follows the reference design for the most part. But
there are no schematics available it seems, so some things should be
taken with a grain of salt.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
CIAA stands for Argentine Open Industrial Computer. The CIAA project
is an initiative sponsored by universities and private companies.
Its main goal is to promote local embedded systems development.
Among other devices, the project developed a NXP LPC4337-based
reference design.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
The option is not needed if chip is always on or managed by some other part
of system like platform card driver.
Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add optional interrupt support to the da9210 regulator driver, to handle
over-current, under- and over-voltage, and over-temperature events.
Only the interrupt sources for which we handle events are unmasked, to
avoid interrupts we cannot handle.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
The controller has a RESET pin which is usually controlled over
a GPIO line. If such a GPIO is provided, perform a RESET
during probe.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Add ASoC driver bindings documentation.
Describe the required properties for each of the hardware IPs drivers.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
"CoreLink Level 2 Cache Controller L2C-310", p. 2-15, section 2.3.2
Shareable attribute" states:
"The default behavior of the cache controller with respect to the
shareable attribute is to transform Normal Memory Non-cacheable
transactions into:
- cacheable no allocate for reads
- write through no write allocate for writes."
Depending on the system architecture, this may cause memory corruption
in the presence of bus mastering devices (e.g. OHCI). To avoid such
corruption, the default behavior can be disabled by setting the Shared
Override bit in the Auxiliary Control register.
Currently the Shared Override bit can be set only using C code:
- by calling l2x0_init() directly, which is deprecated,
- by setting/clearing the bit in the machine_desc.l2c_aux_val/mask
fields, but using values differing from 0/~0 is also deprecated.
Hence add support for an "arm,shared-override" device tree property for
the l2c device node. By specifying this property, affected systems can
indicate that non-cacheable transactions must not be transformed.
Then, it's up to the OS to decide. The current behavior is to set the
"shared attribute override enable" bit, as there may exist kernel linear
mappings and cacheable aliases for the DMA buffers, even if CMA is
enabled.
See also commit 1a8e41cd67 ("ARM: 6395/1: VExpress: Set bit 22 in
the PL310 (cache controller) AuxCtlr register"):
"Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming
Normal Shared Non-cacheable reads into Cacheable no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load
cache lines into the PL310 controller. With bit 22 cleared,
Non-cacheable reads would unexpectedly hit such cache lines leading
to buffer corruption."
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The parallel-display driver used an undocumented, non-standard property
"fsl,panel" to optionally associate with a drm_panel device. This patch
fixes the driver to use the same OF graph bindings as the LDB driver
instead:
parallel-display {
compatible = "fsl,imx-parallel-display";
...
port@1 {
reg = <1>;
parallel_out: endpoint {
remote_endpoint = <&panel_in>;
};
};
};
panel {
...
port {
panel_in: endpoint {
remote-endpoint = <¶llel_out>;
};
};
};
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Merge "omap fixes against v4.2-rc1" from Tony Lindgren:
Minor fixes for omaps against v4.2-rc1. Mostly just minor dts changes
except for a GPMC fix to not use names for probing devices. Also a
one liner clean-up to remove unecessary return from a void function.
The summary for the changes being:
- Fix probe for GPMC devices by reoving limitations based on device
name
- Remove unnecessary return from a void function
- Revert beaglebone RTC sleep fix, we now have a better fix merged
- Add am4372 EMIF node to fix a warning
- Add am57xx-beagle-x15 power supply to fix USB2 if USB1 is disabled
- Disable rfbi for am4372 as it does not have a driver
* tag 'omap-for-v4.2/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am4372.dtsi: disable rfbi
ARM: dts: am57xx-beagle-x15: Provide supply for usb2_phy2
ARM: dts: am4372: Add emif node
Revert "ARM: dts: am335x-boneblack: disable RTC-only sleep"
ARM: OMAP2+: Remove unnessary return statement from the void function, omap2_show_dma_caps
memory: omap-gpmc: Fix parsing of devices
Merge "Allwinner late changes for 4.2" from Maxime Ripard:
Allwinner late changes for 4.2
A bunch of defconfig changes, and some patches to make the Allwinner H3 and
A33 boot properly.
* tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Enable simplefb in the defconfig
ARM: Remove deprecated symbol from defconfig files
ARM: sunxi: Add Machine support for A33
ARM: sunxi: Introduce Allwinner H3 support
Documentation: sunxi: Update Allwinner SoC documentation
In "[3d7ef30] regulator: pwm-regulator: Simplify voltage to duty-cycle
call" we stopped using max_duty_cycle, so we can retire it from device
data and DT.
There is no need to deprecate this property, as it hasn't hit Mainline
yet.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
We're using capitalisation and removing the '-' to mitigate confusion.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add dts file to support Buffalo Linkstation LS-WVL and LS-VL,
which are 3.5" HDD NAS in 2-bay and 1-bay respectively.
[gregory.clement@free-electrons.com: fix typo in pmx-led-function-red]
Signed-off-by: Roger Shimizu <rogershimizu@gmail.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This replaces the platform_name in snd_soc_dai_link by device tree node.
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Hisilicon SMMUv3 devices treat CMD_PREFETCH_CONFIG as a illegal command,
execute it will trigger GERROR interrupt. Although the gerror code manage
to turn the prefetch into a SYNC, and the system can continue to run
normally, but it's ugly to print error information.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
[will: extended binding documentation]
Signed-off-by: Will Deacon <will.deacon@arm.com>
* Add support for continuous-voltage mode
* Put more meat on the bones with regards to voltage-table mode
* Sort out formatting for ease of consumption
Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The MAX8973/MAX77621 feature an Enhanced Transient Response(ETR)
circuit that is enabled through software. The enhanced transient
response reduces the voltage droop during large load steps by
temporarily allowing all three phases to fire in unison, slewing
total inductor current faster than would normally be possible if
all three phases continued to operate 120deg out of phase. The
enhanced transient response detector features two selectable
sensitivity settings, which select the output voltage slew rate
during load transients that triggers the ETR circuit. The sensitivity
of the ETR detector is set by the CKADV[1:0] bits in the CONTROL2
register.
Add support to configure the ETR through platform data from DT.
Update the DT binding document accordingly.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Maximum speed supported by spfi is limited to 1/4 of the spfi clock.
But in some SoCs the maximum speed supported by the spfi block can
be limited to less than 1/4 of the spfi clock. In such cases we have
to define the limit in the device tree so that the driver can pick
it up.
Signed-off-by: Sifan Naeem <sifan.naeem@imgtec.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add a common clock driver for basic gpio controlled clock multiplexers.
This driver can be used for devices like 5V41068A or 831721I from IDT
or for discrete multiplexer circuits. The 'select' pin selects one of
two parent clocks.
Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
[sboyd@codeaurora.org: Fix error paths to free memory and do it
in the correct order]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
