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Rohit Agarwal
98187f7b74 ARM: dts: qcom: sdx65: Enable ARM SMMU 
Add a node for the ARM SMMU found in the SDX65.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649670615-21268-6-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:35:05 -05:00
Rohit Agarwal
dc1a380fcb ARM: dts: qcom: sdx65: Add support for SDHCI controller 
Add devicetree support for SDHCI controller found in Qualcomm SDX65
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649670615-21268-4-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:35:05 -05:00
Rohit Agarwal
a30be44449 ARM: dts: qcom: sdx65: Add reserved memory nodes 
Add reserved memory nodes to the SDX65 dtsi as defined by
the memory map.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649670615-21268-2-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:35:04 -05:00
Krzysztof Kozlowski
43cdc159d2 ARM: dts: qcom: do not use underscore in node name 
Align RPM requests node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Fixed up qcom-{apq8074,msm8974}-*.dts to match the qcom-msm8974.dtsi]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-8-krzysztof.kozlowski@linaro.org
 2022-04-12 22:34:06 -05:00
Krzysztof Kozlowski
c19865df6b ARM: dts: qcom: msm8974-samsung-klte: move gpio-keys out of soc 
The GPIO keys are not part of SoC and they should be defined inside of
the root node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-6-krzysztof.kozlowski@linaro.org
 2022-04-12 22:29:41 -05:00
Krzysztof Kozlowski
d3eff0e174 ARM: dts: qcom: msm8974-lge-nexus5: move gpio-keys out of soc 
The GPIO keys are not part of SoC and they should be defined inside of
the root node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-5-krzysztof.kozlowski@linaro.org
 2022-04-12 22:29:40 -05:00
Rohit Agarwal
dc39466a73 ARM: dts: qcom: sdx65-mtp: Add regulator nodes 
Add the regulators found on SDX65 MTP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-7-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:29:40 -05:00
Rohit Agarwal
52fedb2f32 ARM: dts: qcom: sdx65: Add rpmpd node 
Add rpmpd node and opps for this node to the SDX65 dts.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-5-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:29:40 -05:00
Rohit Agarwal
1ebc5adc26 ARM: dts: qcom: sdx65-mtp: Add pmx65 pmic 
SDX65-mtp features PMX65 pmic, so include the dts as well.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-4-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:29:40 -05:00
Rohit Agarwal
73de2adfb2 ARM: dts: qcom: Add PMIC pmx65 dts 
Add DTS for PMIC PMX65 found in Qualcomm platforms.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-6-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 22:29:40 -05:00
Krzysztof Kozlowski
7b5d442120 dt-bindings: qcom: qcom,geni-se: refer to dtschema for SPI 
After adding DT schema for the SPI controller, the Qualcomm GENI Serial
Engine QUP Wrapper Controller bindings can reference it directly for
full schema validation.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220404064017.68634-2-krzysztof.kozlowski@linaro.org
 2022-04-12 22:20:46 -05:00
Krzysztof Kozlowski
e5baef55f8 dt-bindings: clock: qcom,rpmcc: add clocks property 
The RPM clock controller receive input clock ("xo").  It is modelled on
only one chip - MSM8953.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-11-krzysztof.kozlowski@linaro.org
 2022-04-12 22:18:09 -05:00
Krzysztof Kozlowski
05a24414fd dt-bindings: clock: qcom,rpmcc: convert to dtschema 
Convert the Qualcomm RPM Clock Controller bindings to DT schema and
include it in parent's schema (SMD RPM).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-10-krzysztof.kozlowski@linaro.org
 2022-04-12 22:18:03 -05:00
Krzysztof Kozlowski
375eed5f51 dt-bindings: soc: qcom,smd: convert to dtschema 
Convert the Qualcomm Shared Memory Driver bindings to DT Schema.

Changes against original bindings: enforce only specific names of child
nodes, instead of any names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-9-krzysztof.kozlowski@linaro.org
 2022-04-12 22:17:49 -05:00
Krzysztof Kozlowski
812b0b61ee arm64: dts: qcom: add RPM clock controller fallback compatible 
The bindings require a fallback compatible to RPM clock controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:57 -05:00
Krzysztof Kozlowski
0e324e9f49 arm64: dts: qcom: msm8994: remove SMD qcom,local-pid property 
The Qualcomm SMD does not use qcom,local-pid property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:36 -05:00
Krzysztof Kozlowski
b3d26821d9 arm64: dts: qcom: msm8953: do not use underscore in node name 
Align RPM requests node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:25 -05:00
Luca Weiss
22437c436c arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifi 
Configure regulators used by the wifi hardware and enable it.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
 2022-04-12 22:10:13 -05:00
Luca Weiss
48cc9bb1d3 arm64: dts: qcom: sm6350: Add wifi node 
Add a node describing the wifi hardware found on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-1-luca.weiss@fairphone.com
 2022-04-12 22:10:11 -05:00
Konrad Dybcio
d8023f3a8e arm64: dts: qcom: msm8994: Add mmc aliases 
Set the aliases for both SDHCI controllers.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-16-konrad.dybcio@somainline.org
 2022-04-12 22:09:17 -05:00
Konrad Dybcio
e0be93fb38 arm64: dts: qcom: msm8994: Add watchdog timer node 
Add and configure the watchdog node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-15-konrad.dybcio@somainline.org
 2022-04-12 22:09:01 -05:00
Konrad Dybcio
1ae438d26b arm64: dts: qcom: msm8994: Fix BLSP[12]_DMA channels count 
MSM8994 actually features 24 DMA channels for each BLSP,
fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-14-konrad.dybcio@somainline.org
 2022-04-12 22:09:00 -05:00
Konrad Dybcio
9d511d0a79 arm64: dts: qcom: msm8994: Add OCMEM node 
Add OCMEM node to allow for GPU SRAM access.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-13-konrad.dybcio@somainline.org
 2022-04-12 22:08:58 -05:00
Konrad Dybcio
410e1619d5 arm64: dts: qcom: msm8994-kitakami: Update regulator configuration 
Remove regulator-always-on property where not necessary and mark regulators
that are not supposed to be voted active on boot with regulator-boot-on.
While at it, reorder the load properties to make it look more decent.

Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's
inability to handle them (at least for now).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-12-konrad.dybcio@somainline.org
 2022-04-12 22:08:56 -05:00
Konrad Dybcio
7d9379bf1e arm64: dts: qcom: msm8994-kitakami: Disable a mistakengly enabled I2C host 
I2C4 turns out not to be used on Kitakami after all and it only blocks a
GPIO used by camera hardware.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-11-konrad.dybcio@somainline.org
 2022-04-12 22:08:54 -05:00
Konrad Dybcio
9e398b4c4e arm64: dts: qcom: msm8992-libra: Fix up the framebuffer 
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting. It's still not perfect, but at least the
kernel log doesn't start a third deep into your screen..

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Folded in change of framebuffer base address, from Konrad]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-10-konrad.dybcio@somainline.org
 2022-04-12 22:08:33 -05:00
Konrad Dybcio
049c46f31a arm64: dts: qcom: msm8994: Fix the cont_splash_mem address 
The default memory map places cont_splash_mem at 3401000, which was
overlooked.. Fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-9-konrad.dybcio@somainline.org
 2022-04-12 22:07:26 -05:00
Konrad Dybcio
b0b5687a2c arm64: dts: qcom: msm8992: Use the correct MMCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-8-konrad.dybcio@somainline.org
 2022-04-12 22:07:24 -05:00
Konrad Dybcio
355ea704c8 arm64: dts: qcom: msm8992: Use the correct GCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
 2022-04-12 22:07:21 -05:00
Konrad Dybcio
e9b0eb5420 arm64: dts: qcom: msm8994: Add MMCC node 
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
 2022-04-12 22:07:18 -05:00
Konrad Dybcio
2d0f45f760 arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay" 
The framebuffer is already enabled by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
 2022-04-12 22:07:17 -05:00
Konrad Dybcio
ed288ae94a arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1 
The phone seems to randomly crash when more than 1 CPU is enabled, which
is probably related to lack of some driver.

Restrict the device to only use a single core until this is solved.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
 2022-04-12 22:07:16 -05:00
Konrad Dybcio
13cff03303 arm64: dts: qcom: msm8992-libra: Add CPU regulators 
Specify CPU regulator voltages for both VDD_APC rails.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
 2022-04-12 22:07:12 -05:00
Konrad Dybcio
5827e28304 arm64: dts: qcom: msm8994: Fix sleep clock name 
The sleep clock name expected by GCC is actually "sleep" and not
"sleep_clk". Fix the clock-names value for it to make sure it is
provided.

Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC")

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
 2022-04-12 22:07:04 -05:00
Rohit Agarwal
26380f298b ARM: dts: qcom: sdx65-mtp: Add pmk8350b and pm8150b pmic 
SDX65-mtp features PMK8350b and PM8150B pmic, so include the dts as well

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-3-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 21:55:38 -05:00
Rohit Agarwal
324db76df1 ARM: dts: qcom: sdx65: Add spmi node 
Add SPMI node to SDX65 dtsi.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647411447-25249-2-git-send-email-quic_rohiagar@quicinc.com
 2022-04-12 21:55:37 -05:00
Akhil P Oommen
3bfef00d76 arm64: dts: qcom: sc7280: Support gpu speedbin 
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226005021.v2.5.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid
 2022-04-12 21:54:08 -05:00
Ansuel Smith
a5ba119455 ARM: dts: qcom: add syscon and cxo/pxo clock to gcc node for ipq8064 
Add syscon compatible required for tsens driver to correctly probe driver
and access the reg. Also add cxo and pxo tag and declare them as gcc clock
now requires them for the ipq8064 gcc driver that has now been modernized.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226135235.10051-16-ansuelsmth@gmail.com
 2022-04-12 21:40:24 -05:00
Adam Skladowski
34128350b8 firmware: qcom_scm: Add compatible for MSM8976 SoC 
Add compatible for SCM on MSM8976.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220307191726.10869-5-a39.skl@gmail.com
 2022-04-12 21:36:19 -05:00
Adam Skladowski
a175c6faaa dt-bindings: firmware: qcom-scm: Document msm8976 bindings 
SCM driver on MSM8976 requires 3 clocks.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220307191726.10869-4-a39.skl@gmail.com
 2022-04-12 21:36:18 -05:00
Luca Weiss
d3236c598e ARM: dts: qcom: Add support for ASUS ZenWatch 2 
Add support for this smartwatch, based on Snapdragon 400 SoC.

Currently supported functionality:
* Internal storage
* USB
* Charger
* Power button
* Vibration motor
* Bluetooth
* Wifi

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226101939.1011551-2-luca@z3ntu.xyz
 2022-04-12 21:35:40 -05:00
Luca Weiss
b736cedce5 dt-bindings: arm: qcom: Document asus,sparrow device 
Document the ASUS ZenWatch 2 ("sparrow") which is a smartwatch based on
Snapdragon 400 SoC.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226101939.1011551-1-luca@z3ntu.xyz
 2022-04-12 21:35:38 -05:00
Kathiravan T
f607dd767f arm64: dts: qcom: ipq8074: fix the sleep clock frequency 
Sleep clock frequency should be 32768Hz. Lets fix it.

Cc: stable@vger.kernel.org
Fixes: 41dac73e24 ("arm64: dts: Add ipq8074 SoC and HK01 board support")
Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
 2022-04-12 21:35:10 -05:00
Dmitry Baryshkov
6ffe07ba14 ARM: dts: qcom: msm8974: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Fixes: 5a9fc531f6 ("ARM: dts: msm8974: add display support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-6-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:35 -05:00
Dmitry Baryshkov
be63332992 arm64: dts: qcom: sm8250: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:13 -05:00
Dmitry Baryshkov
0316da6bbc arm64: dts: qcom: sdm845: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:11 -05:00
Dmitry Baryshkov
63ddd8a54d arm64: dts: qcom: sdm660: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: ab29028439 ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:10 -05:00
Dmitry Baryshkov
2a11b3bfc5 arm64: dts: qcom: sdm630: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: b52555d590 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:07 -05:00
Dmitry Baryshkov
7b36ab2673 arm64: dts: qcom: msm8996: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 12d5403757 ("arm64: dts: qcom: msm8996: Add DSI0 nodes")
Fixes: 3a4547c1fc ("arm64: qcom: msm8996.dtsi: Add Display nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-1-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:06 -05:00
Deepak Kumar Singh
f1383348ad soc: qcom: smem: validate fields of shared structures 
Structures in shared memory that can be modified by remote
processors may have untrusted values, they should be validated
before use.

Adding proper validation before using fields of shared
structures.

Signed-off-by: Deepak Kumar Singh <quic_deesin@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1646147913-15791-2-git-send-email-quic_deesin@quicinc.com
 2022-04-12 21:29:58 -05:00