Samsung DTS ARM changes for v5.7
1. Various fixes:
- Reboot of some Odroid Exynos4412-based boards,
- MMC regulators on Arndale5250,
- Memory mapping on Artik5,
- GPU power domain on Exynos542x boards,
- LCD SPI polarity on UniversalC210,
2. Add thermal cooling of GPU on Odroid XU3/XU4 family,
3. Add dynamic-power-coefficient to Exynos5422 for energy model.
* tag 'samsung-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Fix polarity of the LCD SPI bus on UniversalC210 board
ARM: dts: exynos: Fix G3D power domain supply on Arndale Octa boards
ARM: dts: exynos: Fix G3D power domain supply on Odroid XU3/XU4/HC1 boards
ARM: dts: exynos: Fix memory on Artik5 evaluation boards
ARM: dts: exynos: Make fixed regulators always-on on Arndale5250
ARM: dts: exynos: Fix MMC regulator on Arndale5250 board
ARM: dts: exynos: Add dynamic-power-coefficient to Exynos5422 CPUs
ARM: dts: exynos: Add GPU thermal zone cooling maps for Odroid XU3/XU4/HC1
ARM: dts: exynos: Fix broken reboot on some Odroid U2/X2/U3 boards
Link: https://lore.kernel.org/r/20200316175652.5604-3-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mvebu dt64 for 5.7 (part 1)
Improve network support on two Armada 8040 based board:
Clearfog GT 8 and Macchiatobin.
Add ethernet alias on Espressobin for U-Boot support.
Fix various dt compilation issue or warning.
* tag 'mvebu-dt64-5.7-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Fix cpu compatible for AP807-quad
arm64: dts: marvell: fix non-existed cpu referrence in armada-ap806-dual.dtsi
arm64: dts: marvell: build ESPRESSObin variants
arm64: dts: marvell: espressobin: indicate dts version
arm64: dts: marvell: espressobin: add ethernet alias
arm64: dts: mcbin: support 2W SFP modules
arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay
Link: https://lore.kernel.org/r/87h7yqx7w2.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm64: tegra: Device tree changes for v5.7-rc1
These changes add support for the XUSB pad controller, as well as the
XUSB controller on Tegra194. Furthermore, USB device mode is supported
across Tegra210 and Tegra186 boards. PCIe endpoint mode support is added
for the Jetson AGX Xavier platform.
Various minor fixes eliminate warnings on boot related to missing power
supplies for some devices.
* tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
arm64: tegra: Add ethernet alias on Jetson TX1
arm64: tegra: Populate LP8557 backlight regulator
arm64: tegra: Fix Tegra186 SOR supply
arm64: tegra: Add EEPROM supplies
arm64: tegra: Enable I2C controller for EEPROM
arm64: tegra: smaug: Change clk_out_2 provider to PMC
arm64: tegra: Add clock-cells property to Tegra PMC node
arm64: tegra: Enable XUDC node on Jetson Nano
arm64: tegra: Update OTG port entries for Jetson Nano
arm64: tegra: Enable XUDC node on Jetson TX2
arm64: tegra: Add XUDC node for Tegra186
arm64: tegra: Enable XUDC on Jetson TX1
arm64: tegra: Add XUDC node for Tegra210
arm64: tegra: Update OTG port entries for Jetson TX2
arm64: tegra: Update OTG port entries for Jetson TX1
arm64: tegra: Enable XUSB host in P2972-0000 board
arm64: tegra: Add XUSB and pad controller on Tegra194
arm64: tegra: Fix Tegra194 PCIe compatible string
Link: https://lore.kernel.org/r/20200313165848.2915133-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: tegra: Device tree changes for v5.7-rc1
Minor fixes and additions for 32-bit Tegra SoC device trees.
* tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update sound node clocks in device tree
ARM: tegra: Add clock-cells property to PMC
ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
Link: https://lore.kernel.org/r/20200313165848.2915133-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dt-bindings: Changes for v5.7-rc1
New IDs are added for clocks that are controlled by the PMC. This
replaces older IDs that were erroneously provided by the clock and reset
controller.
This also adds device tree bindings for XUSB pad controller support on
Tegra194 as well as USB role switching on NVIDIA Tegra SoCs.
* tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT updates for v5.3, round 1
Highlights:
----------
- Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. It is based on stm32mp157c SoC.
- Add OTG full support on stm32mp15.
- Fix issues seen during yaml validation on stpmic and stmfx.
- Add i2c power/wakeup support on stm32mp15.
- Add card detect on sdcard on stm32mp boards
* tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
ARM: dts: stm32: Correct stmfx node name on stm32746g-eval board
ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
ARM: dts: stm32: add USB OTG full support on stm32mp151
ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board
...
Link: https://lore.kernel.org/r/ded09d01-df47-9572-4679-34669bff8916@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Renesas DT binding updates for v5.7
- Document support for the M3ULCB board with R-Car M3-W+.
* tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+
Link: https://lore.kernel.org/r/20200313154304.1636-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Renesas ARM64 DT updates for v5.7 (take two)
- Thermal support for R-Car M3-W+,
- Support for the M3ULCB board with R-Car M3-W+,
- CPUIdle support for R-Car M3-N and E3,
- Display support for the HiHope RZ/G2M board,
- A minor fix.
* tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
arm64: dts: renesas: r8a77961: Add thermal nodes
Link: https://lore.kernel.org/r/20200313154304.1636-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:
- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS
- Nicolas moves the eMMC2 controller into its separate node in order for
platform firmware to perform the necessary "dma-ranges" property
patching based on the chip revision since the eMMC controller has
different addressing constraints.
- Florian convers a whole bunch of Broadcom boards bindings from text to
YAML.
* tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux:
dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
dt-bindings: arm: bcm: Convert Vulcan to YAML
dt-bindings: arm: bcm: Convert BCM11351 to YAML
dt-bindings: arm: bcm: Convert BCM4708 to YAML
dt-bindings: arm: bcm: Convert BCM23550 to YAML
dt-bindings: arm: bcm: Convert BCM21664 to YAML
dt-bindings: arm: bcm: Convert Stingray to YAML
dt-bindings: arm: bcm: Convert Northstar 2 to YAML
dt-bindings: arm: bcm: Convert Northstar Plus to YAML
dt-bindings: arm: bcm: Convert Hurricane 2 to YAML
dt-bindings: arm: bcm: Convert Cygnus to YAML
ARM: dts: bcm2711: Move emmc2 into its own bus
ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels
Link: https://lore.kernel.org/r/20200311212012.9418-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree changes for omaps for v5.7 merge window
Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.
* tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am4372: Add idle_states for cpuidle
ARM: dts: am33xx: Add idle_states for cpuidle
ARM: dts: Configure omap5 AESS
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Versatile DTS updates for the v5.7 series take one:
- Schema validation for the top level of all ARM reference
designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.
* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM/arm64: dts: Rename SMB bus to just bus
dt-bindings: arm: Drop the non-YAML bindings
dt-bindings: arm: Add Versatile Express and Juno YAML schema
dt-bindings: arm: Add RealView YAML schema
dt-bindings: arm: Add Versatile YAML schema
dt-bindings: arm: Add Integrator YAML schema
ARM: dts: RealView: Fix the name of the SoC node
ARM: dts: Versatile: Use syscon as node name for IB2
ARM: dts: integratorap: Remove top level dma-ranges
Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kalle Valo says:
====================
wireless-drivers fixes for v5.6
Fourth, and last, set of fixes for v5.6. Just two important fixes to
iwlwifi regressions.
iwlwifi
* fix GEO_TX_POWER_LIMIT command on certain devices which caused
firmware to crash during initialisation
* add back device ids for three devices which were accidentally
removed
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
cpuidle: tegra: Changes for v5.7-rc1
These changes unify CPU idle support for Tegra20, Tegra30 and Tegra114.
* tag 'tegra-for-5.7-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
cpuidle: tegra: Disable CC6 state if LP2 unavailable
cpuidle: tegra: Squash Tegra114 driver into the common driver
cpuidle: tegra: Squash Tegra30 driver into the common driver
cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
Link: https://lore.kernel.org/r/20200313165848.2915133-9-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
pmic wrapper:
- add support for MT6779 SoC
cmdq-helper:
- set knows_txdone in mailbox client
* tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add support for MT6359 PMIC
soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
dt-bindings: pwrap: mediatek: add pwrap support for MT6779
soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper
Link: https://lore.kernel.org/r/61165e91-f211-ad37-a81c-cbf3ff69fa1b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
i.MX SoC changes for 5.7:
- A number of cleanups from Anson Huang to remove unneeded includes,
drop unnecessary newlines and base check etc.
- Apply Cortex-A9 specific errata only to Cortex-A9 based i.MX SoCs
and avoid impacting Cortex-A7 based designs.
* tag 'imx-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Drop unnecessary src_base check
ARM: imx: Remove unnecessary blank lines
ARM: imx: Add missing of_node_put()
ARM: imx: Remove unused include of linux/of.h on mach-imx6sl.c
ARM: imx: Remove unused includes on mach-imx6q.c
ARM: imx: Remove unused include of linux/irqchip/arm-gic.h
ARM: imx: limit errata selection to Cortex-A9 based designs
Link: https://lore.kernel.org/r/20200318051918.32579-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mvebu arm for 5.6 (part 1)
Various cleanup:
On Orion5x:
- Drop unneeded select of PCI_DOMAINS_GENERIC
- Remove unneeded variable ret
- Replace setup_irq() by request_irq()
On Dove: Mark dove_io_desc as __maybe_unused
* tag 'mvebu-arm-5.7-1' of git://git.infradead.org/linux-mvebu:
arm: mach-dove: Mark dove_io_desc as __maybe_unused
ARM: orion: replace setup_irq() by request_irq()
ARM: orion5x: ts78xx: Remove unneeded variable ret
ARM: orion5x: Drop unneeded select of PCI_DOMAINS_GENERIC
Link: https://lore.kernel.org/r/87eetux7um.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ARM: tegra: Core changes for v5.7-rc1
These patches a preparatory work to move the CPU idle drivers into
drivers/cpuidle.
* tag 'tegra-for-5.7-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cpuidle: Remove unnecessary memory barrier
ARM: tegra: cpuidle: Make abort_flag atomic
ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
ARM: tegra: Make outer_disable() open-coded
ARM: tegra: Rename some of the newly exposed PM functions
ARM: tegra: Expose PM functions required for new cpuidle driver
ARM: tegra: Propagate error from tegra_idle_lp2_last()
ARM: tegra: Change tegra_set_cpu_in_lp2() type to void
ARM: tegra: Remove pen-locking from cpuidle-tegra20
ARM: tegra: Add tegra_pm_park_secondary_cpu()
ARM: tegra: Compile sleep-tegra20/30.S unconditionally
Link: https://lore.kernel.org/r/20200313165848.2915133-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
soc/tegra: Changes for v5.7-rc1
These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).
* tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Cleanup whitespace usage
soc/tegra: pmc: Add pins for Tegra194
soc/tegra: Add support for 32 kHz blink clock
soc/tegra: Add Tegra PMC clocks registration into PMC driver
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 SoC updates for v5.7, round 1
Highlights:
----------
- Add early console support for all STM32 SoCs: F4/F7/H7/MP1
* tag 'stm32-soc-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: debug: stm32: add UART early console support for STM32MP1
ARM: debug: stm32: add UART early console support for STM32H7
ARM: debug: stm32: add UART early console configuration for STM32F7
ARM: debug: stm32: add UART early console configuration for STM32F4
Link: https://lore.kernel.org/r/4e427e37-99c9-239a-f3f8-a3bf50eb1eb2@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Allwinner Core Changes for v5.7
Just one change for our mach code for including the correct clk header.
* tag 'sunxi-core-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: Replace <linux/clk-provider.h> by <linux/of_clk.h>
Link: https://lore.kernel.org/r/20200313055342.GA19760@wens.csie.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
PM changes for am335x and am437x for v5.7 merge window
A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.
* tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
soc: ti: pm33xx: Add base cpuidle support
ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
dt-bindings: arm: cpu: Add TI AM335x and AM437x enable method
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SoC changes for omaps for v5.7 merge window
A change to improve the warning output for device tree data
mismatch as compared to legacy platform data for ti-sysc
related interconnect target modules.
And change omap1 to request_irq() instead of setup_irq().
* tag 'omap-for-v5.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: replace setup_irq() by request_irq()
ARM: OMAP2+: Improve handling of ti-sysc related sysc_fields
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lift the common namespace identifier reporting between the shared
namespace and new nshead cases into common code. This also means
one less lock is held while doing I/O.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
There is no non __-prefixed version, so make the name a little more
readable.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Move the handling of an error into the function from the caller, and
only do it for an actual error on the admin command itself, not the
command parsing, as that should be enough to deal with devices claiming
a bogus version compliance.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Calling nvme_sysfs_delete() when the controller is in the middle of
creation may cause several bugs. If the controller is in NEW state we
remove delete_controller file and don't delete the controller. The user
will not be able to use nvme disconnect command on that controller again,
although the controller may be active. Other bugs may happen if the
controller is in the middle of create_ctrl callback and
nvme_do_delete_ctrl() starts. For example, freeing I/O tagset at
nvme_do_delete_ctrl() before it was allocated at create_ctrl callback.
To fix all those races don't allow the user to delete the controller
before it was fully created.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Put the ctrl reference count at nvme_uninit_ctrl as opposed to
nvme_init_ctrl which takes it. This decrease the reference count at the
core layer instead of decreasing it on each transport separately.
Also move the call of nvme_uninit_ctrl at PCI driver after calling to
nvme_release_prp_pools and nvme_dev_unmap, in order to put the reference
count after using the dev. This is safe because those functions use
nvme_dev which is freed only later at nvme_pci_free_ctrl.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
In case nvme_sysfs_delete() is called by the user before taking the ctrl
reference count, the ctrl may be freed during the creation and cause the
bug. Take the reference as soon as the controller is externally visible,
which is done by cdev_device_add() in nvme_init_ctrl(). Also take the
reference count at the core layer instead of taking it on each transport
separately.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Destroy the resources in the same order like in nvme_probe error flow to
improve code readability.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
ida instances allocate some internal memory in addition to the base
'struct ida'. Use ida_destroy() to release that memory at module_exit().
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Currently 32 bit application gets ENOTTY when it calls
compat_ioctl with NVME_IOCTL_SUBMIT_IO in 64 bit kernel.
The cause is that the results of sizeof(struct nvme_user_io),
which is used to define NVME_IOCTL_SUBMIT_IO,
are not same between 32 bit compiler and 64 bit compiler.
* 32 bit: the result of sizeof nvme_user_io is 44.
* 64 bit: the result of sizeof nvme_user_io is 48.
64 bit compiler seems to add 32 bit padding for multiple of 8 bytes.
This patch adds a compat_ioctl handler.
The handler replaces NVME_IOCTL_SUBMIT_IO32 with NVME_IOCTL_SUBMIT_IO
in case 32 bit application calls compat_ioctl for submit in 64 bit kernel.
Then, it calls nvme_ioctl as usual.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada (KIOXIA) <masahiro31.yamada@kioxia.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
If we have a 4-byte data digest to send to the wire, but we
have more data to send, set MSG_MORE to tell the stack
that more is coming.
Reviewed-by: Mark Wunderlich <mark.wunderlich@intel.com>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Since snprintf() returns the would-be-output size instead of the
actual output size, the succeeding calls may go beyond the given
buffer limit. Fix it by replacing with scnprintf().
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The nvme multipath error handling defaults to controller reset if the
error is unknown. There are, however, no existing nvme status codes that
indicate a reset should be used, and resetting causes unnecessary
disruption to the rest of IO.
Change nvme's error handling to first check if failover should happen.
If not, let the normal error handling take over rather than reset the
controller.
Based-on-a-patch-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: John Meneghini <johnm@netapp.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Current nvmet-rdma code allocates MR pool budget based on queue size,
assuming both host and target use the same "max_pages_per_mr" count.
After limiting the mdts value for RDMA controllers, we know the factor
of maximum MR's per IO operation. Thus, make sure MR pool will be
sufficient for the required IO depth and IO size.
That is, say host's SQ size is 100, then the MR pool budget allocated
currently at target will also be 100 MRs. But 100 IO WRITE Requests
with 256 sg_count(IO size above 1MB) require 200 MRs when target's
"max_pages_per_mr" is 128.
Reported-by: Krishnamraju Eraparaju <krishna2@chelsio.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
