Commit Graph

78283 Commits

Author SHA1 Message Date
Dom Cobley
9a8fd277a8 drm/vc4: hdmi: Set VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE
Without this bit set, HDMI_MAI_FORMAT doesn't pick up
the format and samplerate from DVP_CFG_MAI0_FMT and you
can't get HDMI_HDMI_13_AUDIO_STATUS_1 to indicate HBR mode

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210525132354.297468-9-maxime@cerno.tech
2021-06-23 14:32:28 +02:00
Dom Cobley
82bd607178 drm/vc4: hdmi: Set HDMI_MAI_FMT
The hardware uses this for generating the right audio
data island packets when using formats other than PCM

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210525132354.297468-8-maxime@cerno.tech
2021-06-23 14:32:27 +02:00
Dom Cobley
1698ecb218 drm/vc4: hdmi: Set HD_CTL_WHOLSMP and HD_CTL_CHALIGN_SET
Symptom is random switching of speakers when using multichannel.

Repeatedly running speakertest -c8 occasionally starts with
channels jumbled. This is fixed with HD_CTL_WHOLSMP.

The other bit looks beneficial and apears harmless in testing so
I'd suggest adding it too.

Documentation says: HD_CTL_WHILSMP_SET
Wait for whole sample. When this bit is set MAI transmit will start
only when there is at least one whole sample available in the fifo.

Documentation says: HD_CTL_CHALIGN_SET
Channel Align When Overflow. This bit is used to realign the audio
channels in case of an overflow.
If this bit is set, after the detection of an overflow, equal
amount of dummy words to the missing words will be written to fifo,
filling up the broken sample and maintaining alignment.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210525132354.297468-7-maxime@cerno.tech
2021-06-23 14:32:27 +02:00
Ville Syrjälä
4441a8e39b drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcs
Split the hsw/bdw/skl/kbl get_buf_trans() functions into
clean platform specific variants.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-11-ville.syrjala@linux.intel.com
2021-06-23 15:31:11 +03:00
Ville Syrjälä
c40a253b71 drm/i915: Introduce encoder->get_buf_trans()
Convert the get_buf_trans() functions into an encoder vfunc.
Allows us to get rid of bunch of platform if-ladders.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-10-ville.syrjala@linux.intel.com
2021-06-23 15:30:45 +03:00
Ville Syrjälä
d2c496f7c9 drm/i915: Store the HDMI default entry in the bug trans struct
Store the default HDMI buf trans entry in struct intel_ddi_buf_trans
so that it's next to the actual table. This let's us start ridding
ourselves of some platofrm specifics in intel_ddi_hdmi_num_entries().

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-9-ville.syrjala@linux.intel.com
2021-06-23 15:30:29 +03:00
Ville Syrjälä
87f7074330 drm/i915; Return the whole buf_trans struct from get_buf_trans()
Raise the abstraction level of the get_buf_trans() functions
a bit more by returning the whole wrapper intel_ddi_buf_trans
struct.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-8-ville.syrjala@linux.intel.com
2021-06-23 15:29:39 +03:00
Ville Syrjälä
439ebf9ef1 drm/i915: Introduce intel_get_buf_trans()
Add a small helper to get the buf trans entris+num_entries
from the struct. Should avoid copy-paste errors in the
platform specific get_buf_trans() functions.

@@
identifier T, N;
@@
- *N = T.num_entries;
- return T.entries;
+ return intel_get_buf_trans(&T, N);

@@
@@
is_hobl_buf_trans(...) { ... }
+
+ static const union intel_ddi_buf_trans_entry *
+ intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries)
+ {
+	*num_entries = ddi_translations->num_entries;
+	return ddi_translations->entries;
+ }

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-7-ville.syrjala@linux.intel.com
2021-06-23 15:29:15 +03:00
Ville Syrjälä
13cee3c123 drm/i915: Wrap the buf trans tables into a struct
Put a wrapper struct around the buf trans tables so that
we can declare the number of entries and default HDMI entry
alongside the table.

@wrap@
identifier old =~ "^.*translations.*";
fresh identifier new = "_" ## old;
type T;
@@
<...
static const T
- old
+ new
[] = {
       ...
};
+
+ static const struct intel_ddi_buf_trans old = {
+  .entries = new,
+  .num_entries = ARRAY_SIZE(new),
+ };
...>

@@
identifier wrap.old;
@@
(
- ARRAY_SIZE(old)
+ old.num_entries
|
- old
+ old.entries
)

@@
@@
union intel_ddi_buf_trans_entry {
...
};
+
+struct intel_ddi_buf_trans {
+       const union intel_ddi_buf_trans_entry *entries;
+       u8 num_entries;
+};

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-6-ville.syrjala@linux.intel.com
2021-06-23 15:28:36 +03:00
Ville Syrjälä
4542c6cff6 drm/i915: Rename dkl phy buf trans tables
Rename the dkl phy buf trans tables to follow the same
naming pattern used by everyone else.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-5-ville.syrjala@linux.intel.com
2021-06-23 15:28:23 +03:00
Ville Syrjälä
30e0afa557 drm/i915: Wrap the platform specific buf trans structs into a union
In order to abstact the buf trans stuff let's wrap the platform
specific structs into a union.

v2: Handle adl-p

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-4-ville.syrjala@linux.intel.com
2021-06-23 15:28:03 +03:00
Ville Syrjälä
d6b10b1ae4 drm/i915: Introduce hsw_get_buf_trans()
All the other platforms handle the output_type stuff in their
*_get_buf_trans() functions. Do the same for hsw/bdw/skl.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-3-ville.syrjala@linux.intel.com
2021-06-23 15:27:40 +03:00
Ville Syrjälä
266152ae61 drm/i915: s/intel/hsw/ for hsw/bdw/skl buf trans
Give the hsw/bdw/skl buf trans stuff a better namespace.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-2-ville.syrjala@linux.intel.com
2021-06-23 15:27:26 +03:00
Vivek Kasireddy
5c68ab9276 drm/virtio: Add the fence in resource_flush if present
If the framebuffer associated with the plane contains a fence, then
it is added to resource_flush and will be waited upon for a max of
50 msecs or until it is signalled by the Host.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210610232456.671905-4-vivek.kasireddy@intel.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-06-23 12:12:00 +02:00
Vivek Kasireddy
56934baef4 drm/virtio: Prepare resource_flush to accept a fence
A fence will be added to resource_flush for resources that
are guest blobs.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210610232456.671905-3-vivek.kasireddy@intel.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-06-23 12:11:59 +02:00
Vivek Kasireddy
3a1fde58fa drm/virtio: Add fences for Guest blobs
Add prepare and cleanup routines for primary planes as well
where a fence is added only if the BO/FB associated with the
plane is a guest blob.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210610232456.671905-2-vivek.kasireddy@intel.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-06-23 12:11:59 +02:00
Dave Airlie
61c0cb8ae7 Merge tag 'drm-misc-next-fixes-2021-06-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
Short summary of fixes pull:

 * hyperv: advertise the correct formatmodifiers for its primary plane
 * dp_mst: VCPI fixes to make it work with StarTech hub
 * dp_mst: Fix build error

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/YMxgI1oluBpPyfu6@linux-uq9g.fritz.box
2021-06-23 14:46:39 +10:00
Dave Airlie
bde431fbe8 Merge tag 'drm/tegra/for-5.14-rc1' of ssh://git.freedesktop.org/git/tegra/linux into drm-next
drm/tegra: Changes for v5.14-rc1

The two major changes here are fixed YUV support as well as scaling on
Tegra186 and later. This allows Tegra DRM to be used, for example, as a
video sink for the kmssink gstreamer plugin. The remainder of the
changes are minor fixes.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210611165157.3569315-1-thierry.reding@gmail.com
2021-06-23 14:24:37 +10:00
Dave Airlie
f45fbbb6d5 Backmerge tag 'v5.13-rc7' into drm-next
Backmerge Linux 5.13-rc7 to make some pulls from later bases apply,
and to bake in the conflicts so far.
2021-06-23 10:07:48 +10:00
Alex Deucher
8fe44c080a drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN
No need for a separate flag now that DCN3.1 is not in bring up.
Fold into DRM_AMD_DC_DCN like previous DCN IPs.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-22 16:51:45 -04:00
Bernard Zhao
519424d776 drm/radeon: delete useless function return values & remove meaningless if(r) check code
Function radeon_fence_driver_init always returns success,
the function type maybe coule be changed to void.
This patch first delete the check of the return
value of the function call radeon_fence_driver_init, then,
optimise the function declaration and function to void type.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-22 16:51:45 -04:00
Aric Cyr
a7268cf9a4 drm/amd/display: 3.2.141
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-22 16:51:45 -04:00
Anthony Koo
021eaef8ae drm/amd/display: [FW Promotion] Release 0.0.71
- Introduce CMD for EDID CEA block parsing
- Add SCR5 definition for reporting eDP power sequencer status

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-22 16:51:45 -04:00
Josip Pavic
7335d95659 drm/amd/display: do not compare integers of different widths
[Why & How]
Increase width of some variables to avoid comparing integers of
different widths

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-22 16:51:44 -04:00
Stylon Wang
715bfff397 drm/amd/display: Revert "Guard ASSR with internal display flag"
This reverts commit 9127daa0a8.

[Why]
1. Previous patch regresses on some embedded panels.
2. Project coreboot doesn't support passing of internal display flag.

[How]
This reverts "Guard ASSR with internal display flag" commit.

Fixes: 9127daa0a8 ("drm/amd/display: Guard ASSR with internal display flag")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1620
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-06-22 16:45:10 -04:00
Zhen Lei
6fd8f323b3 drm/kmb: Fix error return code in kmb_hw_init()
When the call to platform_get_irq() to obtain the IRQ of the lcd fails, the
returned error code should be propagated. However, we currently do not
explicitly assign this error code to 'ret'. As a result, 0 was incorrectly
returned.

Fixes: 7f7b96a8a0 ("drm/kmb: Add support for KeemBay Display")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210513134639.6541-1-thunder.leizhen@huawei.com
2021-06-22 10:33:49 -07:00
Christian König
8ddf5b9bb4 drm/amdgpu: wait for moving fence after pinning
We actually need to wait for the moving fence after pinning
the BO to make sure that the pin is completed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
References: https://lore.kernel.org/dri-devel/20210621151758.2347474-1-daniel.vetter@ffwll.ch/
CC: stable@kernel.org
Link: https://patchwork.freedesktop.org/patch/msgid/20210622114506.106349-3-christian.koenig@amd.com
2021-06-22 15:29:03 +02:00
Christian König
4b41726aae drm/radeon: wait for moving fence after pinning
We actually need to wait for the moving fence after pinning
the BO to make sure that the pin is completed.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
References: https://lore.kernel.org/dri-devel/20210621151758.2347474-1-daniel.vetter@ffwll.ch/
CC: stable@kernel.org
Link: https://patchwork.freedesktop.org/patch/msgid/20210622114506.106349-2-christian.koenig@amd.com
2021-06-22 15:29:03 +02:00
Christian König
17b11f7179 drm/nouveau: wait for moving fence after pinning v2
We actually need to wait for the moving fence after pinning
the BO to make sure that the pin is completed.

v2: grab the lock while waiting

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
References: https://lore.kernel.org/dri-devel/20210621151758.2347474-1-daniel.vetter@ffwll.ch/
CC: stable@kernel.org
Link: https://patchwork.freedesktop.org/patch/msgid/20210622114506.106349-1-christian.koenig@amd.com
2021-06-22 15:29:03 +02:00
Jani Nikula
17203224f0 drm/i915/dsc: abstract helpers to get bigjoiner primary/secondary crtc
Add a single point of truth for figuring out the primary/secondary crtc
for bigjoiner instead of duplicating the magic pipe +/- 1 in multiple
places.

Also fix the pipe validity checks to properly take non-contiguous pipes
into account. The current checks may theoretically overflow
i915->pipe_to_crtc_mapping[pipe], albeit with a warning, due to fused
off pipes, as INTEL_NUM_PIPES() returns the actual number of pipes on
the platform, and the check is for INTEL_NUM_PIPES() == pipe + 1.

Prefer primary/secondary terminology going forward.

v2:
- Improved abstractions for pipe validity etc.

Fixes: 8a029c113b ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave")
Fixes: d961eb20ad ("drm/i915/bigjoiner: atomic commit changes for uncompressed joiner")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.dl.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610090528.20511-1-jani.nikula@intel.com
2021-06-22 15:52:08 +03:00
Christian König
8c505bdc9c drm/amdgpu: rework dma_resv handling v3
Drop the workaround and instead implement a better solution.

Basically we are now chaining all submissions using a dma_fence_chain
container and adding them as exclusive fence to the dma_resv object.

This way other drivers can still sync to the single exclusive fence
while amdgpu only sync to fences from different processes.

v3: add the shared fence first before the exclusive one

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210614174536.5188-2-christian.koenig@amd.com
2021-06-22 11:05:05 +02:00
Christian König
22f0463ae6 drm/amdgpu: unwrap fence chains in the explicit sync fence
Unwrap the explicit fence if it is a dma_fence_chain and
sync to the first fence not matching the owner rules.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210614174536.5188-1-christian.koenig@amd.com
2021-06-22 11:05:04 +02:00
Daniel Vetter
f54b3ca7ea Revert "drm: add a locked version of drm_is_current_master"
This reverts commit 1815d9c86e.

Unfortunately this inverts the locking hierarchy, so back to the
drawing board. Full lockdep splat below:

======================================================
WARNING: possible circular locking dependency detected
5.13.0-rc7-CI-CI_DRM_10254+ #1 Not tainted
------------------------------------------------------
kms_frontbuffer/1087 is trying to acquire lock:
ffff88810dcd01a8 (&dev->master_mutex){+.+.}-{3:3}, at: drm_is_current_master+0x1b/0x40
but task is already holding lock:
ffff88810dcd0488 (&dev->mode_config.mutex){+.+.}-{3:3}, at: drm_mode_getconnector+0x1c6/0x4a0
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #2 (&dev->mode_config.mutex){+.+.}-{3:3}:
       __mutex_lock+0xab/0x970
       drm_client_modeset_probe+0x22e/0xca0
       __drm_fb_helper_initial_config_and_unlock+0x42/0x540
       intel_fbdev_initial_config+0xf/0x20 [i915]
       async_run_entry_fn+0x28/0x130
       process_one_work+0x26d/0x5c0
       worker_thread+0x37/0x380
       kthread+0x144/0x170
       ret_from_fork+0x1f/0x30
-> #1 (&client->modeset_mutex){+.+.}-{3:3}:
       __mutex_lock+0xab/0x970
       drm_client_modeset_commit_locked+0x1c/0x180
       drm_client_modeset_commit+0x1c/0x40
       __drm_fb_helper_restore_fbdev_mode_unlocked+0x88/0xb0
       drm_fb_helper_set_par+0x34/0x40
       intel_fbdev_set_par+0x11/0x40 [i915]
       fbcon_init+0x270/0x4f0
       visual_init+0xc6/0x130
       do_bind_con_driver+0x1e5/0x2d0
       do_take_over_console+0x10e/0x180
       do_fbcon_takeover+0x53/0xb0
       register_framebuffer+0x22d/0x310
       __drm_fb_helper_initial_config_and_unlock+0x36c/0x540
       intel_fbdev_initial_config+0xf/0x20 [i915]
       async_run_entry_fn+0x28/0x130
       process_one_work+0x26d/0x5c0
       worker_thread+0x37/0x380
       kthread+0x144/0x170
       ret_from_fork+0x1f/0x30
-> #0 (&dev->master_mutex){+.+.}-{3:3}:
       __lock_acquire+0x151e/0x2590
       lock_acquire+0xd1/0x3d0
       __mutex_lock+0xab/0x970
       drm_is_current_master+0x1b/0x40
       drm_mode_getconnector+0x37e/0x4a0
       drm_ioctl_kernel+0xa8/0xf0
       drm_ioctl+0x1e8/0x390
       __x64_sys_ioctl+0x6a/0xa0
       do_syscall_64+0x39/0xb0
       entry_SYSCALL_64_after_hwframe+0x44/0xae
other info that might help us debug this:
Chain exists of: &dev->master_mutex --> &client->modeset_mutex --> &dev->mode_config.mutex
 Possible unsafe locking scenario:
       CPU0                    CPU1
       ----                    ----
  lock(&dev->mode_config.mutex);
                               lock(&client->modeset_mutex);
                               lock(&dev->mode_config.mutex);
  lock(&dev->master_mutex);
*** DEADLOCK ***
1 lock held by kms_frontbuffer/1087:
 #0: ffff88810dcd0488 (&dev->mode_config.mutex){+.+.}-{3:3}, at: drm_mode_getconnector+0x1c6/0x4a0
stack backtrace:
CPU: 7 PID: 1087 Comm: kms_frontbuffer Not tainted 5.13.0-rc7-CI-CI_DRM_10254+ #1
Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.3234.A01.1906141750 06/14/2019
Call Trace:
 dump_stack+0x7f/0xad
 check_noncircular+0x12e/0x150
 __lock_acquire+0x151e/0x2590
 lock_acquire+0xd1/0x3d0
 __mutex_lock+0xab/0x970
 drm_is_current_master+0x1b/0x40
 drm_mode_getconnector+0x37e/0x4a0
 drm_ioctl_kernel+0xa8/0xf0
 drm_ioctl+0x1e8/0x390
 __x64_sys_ioctl+0x6a/0xa0
 do_syscall_64+0x39/0xb0
 entry_SYSCALL_64_after_hwframe+0x44/0xae

Note that this broke the intel-gfx CI pretty much across the board
because it has to reboot machines after it hits a lockdep splat.

Testcase: igt/debugfs_test/read_all_entries
Acked-by: Petri Latvala <petri.latvala@intel.com>
Fixes: 1815d9c86e ("drm: add a locked version of drm_is_current_master")
Cc: Desmond Cheong Zhi Xi <desmondcheongzx@gmail.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210622075409.2673805-1-daniel.vetter@ffwll.ch
2021-06-22 10:41:55 +02:00
Laurent Pinchart
1451d0e90f drm: bridge: ti-sn65dsi83: Retrieve the display mode from the state
Instead of storing a copy of the display mode in the sn65dsi83
structure, retrieve it from the atomic state in
sn65dsi83_atomic_enable(). This allows the removal of the .mode_set()
operation, and completes the transition to the atomic API.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621125518.13715-6-laurent.pinchart@ideasonboard.com
2021-06-22 10:15:58 +02:00
Laurent Pinchart
03ea01c0c2 drm: bridge: ti-sn65dsi83: Retrieve output format from bridge state
The driver currently iterates over all connectors to get the bus format,
used to configure the LVDS output format. This causes several issues:

- If other connectors than the LVDS output are present, the format used
  by the driver may end up belonging to an entirely different output.

- The code can crash if some connectors are not connected, as bus_format
  may then be NULL.

- There's no guarantee that the bus format on the connector at the
  output of the pipeline matches the output of the sn65dsi83, as there
  may be other bridges in the pipeline.

Solve this by retrieving the format from the bridge state instead, which
provides the format corresponding to the output of the bridge.

The struct sn65dsi83 lvds_format_24bpp and lvds_format_jeida fields are
moved to local variables in sn65dsi83_atomic_enable() as they're now
used in that function only.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621125518.13715-5-laurent.pinchart@ideasonboard.com
2021-06-22 10:15:56 +02:00
Laurent Pinchart
a6ea7d268a drm: bridge: ti-sn65dsi83: Switch to atomic operations
Use the atomic version of the enable/disable operations to continue the
transition to the atomic API, started with the introduction of
.atomic_get_input_bus_fmts(). This will be needed to access the mode
from the atomic state.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621125518.13715-4-laurent.pinchart@ideasonboard.com
2021-06-22 10:15:55 +02:00
Laurent Pinchart
7f0b7f5ee3 drm: bridge: ti-sn65dsi83: Pass mode explicitly to helper functions
Pass the display mode explicitly to the sn65dsi83_get_lvds_range() and
sn65dsi83_get_dsi_range() functions to prepare for its removal from the
sn65dsi83 structure. This is not meant to bring any functional change.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621125518.13715-3-laurent.pinchart@ideasonboard.com
2021-06-22 10:15:53 +02:00
Laurent Pinchart
b966d857c5 drm: bridge: ti-sn65dsi83: Move LVDS format selection to .mode_set()
The LVDS format is selected based on the bus format reported by the
connector. This is currently done in .mode_fixup(), but that's not the
right place, as the format should be selected when setting the mode.
Move it to .mode_set().

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621125518.13715-2-laurent.pinchart@ideasonboard.com
2021-06-22 10:15:52 +02:00
Anusha Srivatsa
dac0f8ad65 drm/i915/adl_p: Load DMC
Load DMC v2.10 on ADLP. The release notes mention that
this version enables few power savings features.

v2: Add DMC_PATH() for ADLP (Lucas)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-5-anusha.srivatsa@intel.com
2021-06-21 16:15:30 -07:00
Anusha Srivatsa
2ef140bd23 drm/i915/adl_p: Pipe B DMC Support
ADLP requires us to load both Pipe A and Pipe B.
Plug Pipe B loading support.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-4-anusha.srivatsa@intel.com
2021-06-21 16:15:29 -07:00
Anusha Srivatsa
3d5928a168 drm/i915/xelpd: Pipe A DMC plugging
This patch adds Pipe A plumbing to the already
existing parsing and loading functions which is
taken care of in the prep patches. Adding MAX_DMC_FW
to keep track for both Main and Pipe A DMC while loading
the respective blobs.

Also adding present field in dmc_info.
s/find_dmc_fw_offset/csr_set_dmc_fw_offset. While at it add
fw_info_matches_stepping() helper. CSR_PROGRAM() should now
take the starting address of the particular blob (Main or Pipe)
and not hardcode it.

v2: Add dmc_offset and start_mmioaddr fields for dmc_info struct.

v3: Add a missing corner cases of stepping-substepping combination in
fw_info_matches_stepping() helper.

v4: Add macro for start_mmioaddr for V1 package. Simplify code
in dmc_set_fw_offset (Lucas)

Cc: Souza, Jose <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-3-anusha.srivatsa@intel.com
2021-06-21 16:15:27 -07:00
Anusha Srivatsa
451e05e202 drm/i915/dmc: Introduce DMC_FW_MAIN
This is a prep patch for Pipe DMC plugging.

Add dmc_info struct in intel_dmc to have all common fields
shared between all DMC's in the package.
Add DMC_FW_MAIN(dmc_id 0) to refer to the blob.

v2: Remove dmc_offset and start_mmioaddr from dmc_info struct (Jose)

Cc: Souza, Jose <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-2-anusha.srivatsa@intel.com
2021-06-21 16:15:26 -07:00
Logush Oliver
eeb90e26ed drm/amd/display: Fix edp_bootup_bl_level initialization issue
[why]
Updating the file to fix the missing line

Signed-off-by: Logush Oliver <ollogush@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:15 -04:00
Charlene Liu
452c76dfd2 drm/amd/display: get refclk from MICROSECOND_TIME_BASE_DIV HW register
[why]
recent VBIOS dce_infotable reference clock change caused a I2c regression.
instead of relying on vbios, let's get it from HW directly.

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Roman Li
1a365683d6 drm/amd/display: Delay PSR entry
[Why]
After panel power up, if PSR entry attempted too early,
PSR state may get stuck in transition.
This could happen if the panel is not ready
to respond to the SDP PSR entry message.
In this case dmub f/w is unable to abort PSR entry
since abortion is not permitted after the SDP has been sent.

[How]
Skip 5 pageflips before PSR enable.

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Aurabindo Pillai
9253e11503 drm/amd/display: get socBB from VBIOS for dcn302 and dcn303
[why]
Some SOC BB paramters may vary per SKU, and it does
not make sense for driver to hardcode these values.
This change was added for dcn30 and dcn301, but not
for dcn302 and dcn303

[how]
Parse the values from VBIOS if available, and use
them if valid

Fixes: 93669c8e48 ("drm/amd/display: get socBB from VBIOS")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Wesley Chalmers
d8ddeb155c drm/amd/display: Fix incorrect variable name
[WHY]
extended_end_address can only be calculated from the extended_address and
extended_size

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Martin Tsai
068312559d drm/amd/display: Clear lane settings after LTTPRs have been trained
[Why]
The voltage swing has to start from the minimum level when transmit TPS1 over
Main-Link in clock recovery sequence.
The lane settings from current design will inherit the existing VS/PE values
that could be adjusted by Repeater X, and to use the adjusted voltage swing level
in Repeater X-1 or DPRX could violate DP specs.

[How]
To reset VS from lane settings after LTTPRs have been trained to meet the requirement.

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Nikola Cornij
5d9e7fe8ef drm/amd/display: Clamp VStartup value at DML calculations time
[why]
Some timings with a large VBlank cause the value to overflow the
register related, while also producing other wrong values in DML output.

[how]
Clamp VStartup at the DCN3.1 maximum value

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00
Aric Cyr
d9b20b45ec drm/amd/display: Multiplane cursor position incorrect when plane rotated
[Why]
When video plane is rotate the cursor position is incorrect and not
matching the desktop location.

[How]
When a plane is rotated 90 or 270 degrees, the src_rect.width and height
should be swapped when determining the scaling factor compared to the
dst_rect.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-21 17:45:14 -04:00