Commit Graph

1308 Commits

Author SHA1 Message Date
Stephen Boyd
47505bf3a8 Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next
* clk-kirkwood:
  clk: kirkwood: Fix a clocking boot regression

* clk-imx:
  clk: imx8mn: Add M7 core clock
  clk: imx8m: fix clock tree update of TF-A managed clocks
  clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate
  clk: imx8mn: use correct mux type for clkout path
  clk: imx8mm: use correct mux type for clkout path

* clk-doc:
  dt-bindings: clock: samsung: fix header path in example
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings
  clk: zynqmp: fix kernel doc

* clk-zynq:
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type

* clk-ralink:
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
2021-09-01 15:27:07 -07:00
Stephen Boyd
8fb59ce15c Merge branches 'clk-nvidia', 'clk-rockchip', 'clk-at91' and 'clk-vc5' into clk-next
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators

* clk-nvidia:
  clk: tegra: fix old-style declaration
  clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>

* clk-rockchip:
  clk: rockchip: make rk3308 ddrphy4x clock critical
  clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types
  dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema
  clk: rockchip: Add support for hclk_sfc on rk3036
  clk: rockchip: rk3036: fix up the sclk_sfc parent error
  clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036

* clk-at91:
  clk: at91: clk-generated: Limit the requested rate to our range

* clk-vc5:
  clk: vc5: Add properties for configuring SD/OE behavior
  clk: vc5: Use dev_err_probe
  dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
2021-09-01 15:26:58 -07:00
Stephen Boyd
4990d8c133 Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next
- Support video, gpu, display clks on qcom sc7280 SoCs
 - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
 - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
 - Migrate to clk_parent_data in gcc-sdm660
 - RPMh clks on qcom SM6350 SoCs
 - Support for Mediatek MT8192 SoCs

* clk-qcom: (38 commits)
  clk: qcom: Add SM6350 GCC driver
  dt-bindings: clock: Add SM6350 GCC clock bindings
  clk: qcom: rpmh: Add support for RPMH clocks on SM6350
  dt-bindings: clock: Add RPMHCC bindings for SM6350
  clk: qcom: adjust selects for SM_VIDEOCC_8150 and SM_VIDEOCC_8250
  clk: qcom: Add Global Clock controller (GCC) driver for SM6115
  dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
  clk: qcom: mmcc-msm8994: Add MSM8992 support
  clk: qcom: Add msm8994 MMCC driver
  dt-bindings: clock: Add support for MSM8992/4 MMCC
  clk: qcom: Add Global Clock Controller driver for MSM8953
  dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
  clk: qcom: gcc-sdm660: Replace usage of parent_names
  clk: qcom: gcc-sdm660: Move parent tables after PLLs
  clk: qcom: use devm_pm_runtime_enable and devm_pm_clk_create
  PM: runtime: add devm_pm_clk_create helper
  PM: runtime: add devm_pm_runtime_enable helper
  clk: qcom: a53-pll: Add MSM8939 a53pll support
  dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
  clk: qcom: a53pll/mux: Use unique clock name
  ...

* clk-socfpga:
  clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
  clk: socfpga: agilex: fix up s2f_user0_clk representation
  clk: socfpga: agilex: fix the parents of the psi_ref_clk

* clk-mediatek: (22 commits)
  clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167
  clk: mediatek: Add MT8192 vencsys clock support
  clk: mediatek: Add MT8192 vdecsys clock support
  clk: mediatek: Add MT8192 scp adsp clock support
  clk: mediatek: Add MT8192 msdc clock support
  clk: mediatek: Add MT8192 mmsys clock support
  clk: mediatek: Add MT8192 mfgcfg clock support
  clk: mediatek: Add MT8192 mdpsys clock support
  clk: mediatek: Add MT8192 ipesys clock support
  clk: mediatek: Add MT8192 imp i2c wrapper clock support
  clk: mediatek: Add MT8192 imgsys clock support
  clk: mediatek: Add MT8192 camsys clock support
  clk: mediatek: Add MT8192 audio clock support
  clk: mediatek: Add MT8192 basic clocks support
  clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
  clk: mediatek: Add configurable enable control to mtk_pll_data
  clk: mediatek: Fix asymmetrical PLL enable and disable control
  clk: mediatek: Get regmap without syscon compatible check
  clk: mediatek: Add dt-bindings of MT8192 clocks
  dt-bindings: ARM: Mediatek: Add audsys document binding for MT8192
  ...

* clk-lmk:
  clk: lmk04832: drop redundant fallthrough statements

* clk-x86:
  clk: x86: Rename clk-lpt to more specific clk-lpss-atom
2021-09-01 15:24:59 -07:00
Krzysztof Kozlowski
46d4ee48aa dt-bindings: clock: samsung: fix header path in example
The proper header is exynos4.h:

    samsung,exynos4412-isp-clock.example.dts:19:18: fatal error: dt-bindings/clock/exynos4412.h: No such file or directory

Fixes: 7ac6157809 ("dt-bindings: clock: samsung: convert Exynos4 to dtschema")
Reported-by: Stephen Boyd <sboyd@kernel.org>
Reported-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210831130643.83249-1-krzysztof.kozlowski@canonical.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-31 22:27:20 -07:00
Krzysztof Kozlowski
80204ac4bc dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
Convert Samsung S5Pv210 Audio SubSystem clock controller bindings to DT
schema format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134251.220098-2-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:09:13 -07:00
Krzysztof Kozlowski
e1ec390920 dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
Convert Samsung Exynos Audio SubSystem clock controller bindings to DT
schema format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134251.220098-1-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:09:13 -07:00
Krzysztof Kozlowski
7ac6157809 dt-bindings: clock: samsung: convert Exynos4 to dtschema
Merge Exynos4210 and Exynos4412 clock controller bindings to existing DT
schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210825134056.219884-6-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:09:09 -07:00
Krzysztof Kozlowski
e9385b93ff dt-bindings: clock: samsung: convert Exynos3250 to dtschema
Merge Exynos3250 clock controller bindings to existing DT schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210825134056.219884-5-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:05:30 -07:00
Krzysztof Kozlowski
41059b5d8b dt-bindings: clock: samsung: convert Exynos542x to dtschema
Merge Exynos542x clock controller bindings to existing DT schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134056.219884-4-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:05:30 -07:00
Krzysztof Kozlowski
ea7b028a00 dt-bindings: clock: samsung: add bindings for Exynos external clock
Document the bindings for Samsung Exynos external to SoC
(oscclk/XXTI/XusbXTI) clock provided on boards.  The bindings are
already implemented in most of the Exynos clock drivers and DTS files.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210825134056.219884-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:05:30 -07:00
Krzysztof Kozlowski
ae910bf9d8 dt-bindings: clock: samsung: convert Exynos5250 to dtschema
Convert Samsung Exynos5250 clock controller bindings to DT schema format
using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210825134056.219884-2-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-29 00:05:29 -07:00
Sean Anderson
275e4e2dc0 dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
These properties allow configuring the SD/OE pin as described in the
datasheet.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Link: https://lore.kernel.org/r/20210809223813.3766204-1-sean.anderson@seco.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 23:46:21 -07:00
Rafał Miłecki
6880d94f84 dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
armpll clocks (available on Cygnus and Northstar Plus) are simple clocks
with no cells. Adjust binding props #clock-cells and clock-output-names
to handle them.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20210819052918.6753-1-zajec5@gmail.com
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 23:45:17 -07:00
Konrad Dybcio
920e9b9cd1 dt-bindings: clock: Add SM6350 GCC clock bindings
Add device tree bindings for global clock controller on SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203624.232268-2-konrad.dybcio@somainline.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:03:03 -07:00
Konrad Dybcio
4966c52ad7 dt-bindings: clock: Add RPMHCC bindings for SM6350
Add bindings and update documentation for clock rpmh driver on SM6350.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203243.230157-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:01:21 -07:00
Iskren Chernev
dce25b3e0b dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
Add device tree bindings for global clock controller on SM6115 and
SM4250 SoCs (pin and software compatible).

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-2-iskren.chernev@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 20:54:20 -07:00
Konrad Dybcio
7972609631 dt-bindings: clock: Add support for MSM8992/4 MMCC
Document the multimedia clock controller found on MSM8992/4.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210618111435.595689-1-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:58:11 -07:00
Vladimir Lypak
1b9de19e24 dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
Add bindings and compatible to document MSM8953 GCC (Global Clock
Controller) driver.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Link: https://lore.kernel.org/r/Q6uB3NRxqtD8Prsmliv8ZdsTXGeviv7lb2jQ743jr1E@cp4-web-036.plabs.ch
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:51:18 -07:00
Shawn Guo
f9a6a326f6 dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
Update qcom,a53pll bindings for MSM8939 support:

 - Add optional operating-points-v2 property
 - Add MSM8939 specific compatible

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210704024032.11559-4-shawn.guo@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-05 18:52:11 -07:00
Bjorn Andersson
945cb3a105 clk: qcom: gpucc-sm8150: Add SC8180x support
The GPU clock controller found in SC8180x is a variant of the same block
found in SM8150, but with one additional clock frequency for the
gmu_clk_src clock.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210721225329.3035779-1-bjorn.andersson@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-05 18:50:43 -07:00
Konrad Dybcio
c45e13fa38 dt-bindings: clock: qcom: rpmcc: Document MDM9607 compatible
Add the dt-binding for the RPM Clock Controller on the MDM9607 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210805222400.39027-1-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-05 18:46:18 -07:00
Vladimir Lypak
00555272dc dt-bindings: clock: qcom-rpmcc: Add compatible for MSM8953 SoC
Add compatible for MSM8953 SoC.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Link: https://lore.kernel.org/r/c662hoLme5MIdelk5BVPsVgN77IqTLS0KwYwpauJiDs@cp3-web-047.plabs.ch
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-05 18:43:01 -07:00
Martin Botka
4b1ec711ec dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible
Document the newly added compatible for sm6125 rpmcc.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210629102624.194378-3-martin.botka@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 14:48:17 -07:00
Iskren Chernev
04a572c51a dt-bindings: clock: qcom: rpmcc: Document SM6115 compatible
Add the dt-binding for the RPM Clock Controller on the SM4250/6115 SoCs.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210627185927.695411-3-iskren.chernev@gmail.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 14:41:41 -07:00
Nícolas F. R. A. Prado
d475653672 dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema
Convert the rockchip,rk3399-cru binding to DT schema format.
Tested with
ARCH=arm64 make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml
ARCH=arm64 make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210610175613.167601-1-nfraprado@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-23 13:19:15 +02:00
Taniya Das
f1f5a30385 dt-bindings: clock: Add SC7280 VideoCC clock binding
Add device tree bindings for video clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-7-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Taniya Das
6f1a1ced9e dt-bindings: clock: Add SC7280 GPUCC clock binding
Add device tree bindings for graphics clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-5-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Taniya Das
ced3aaead0 dt-bindings: clock: Add SC7280 DISPCC clock binding
Add device tree bindings for display clock controller subsystem for
Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-3-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Rob Herring
e8917266ae dt-bindings: More dropping redundant minItems/maxItems
Another round of removing redundant minItems/maxItems from new schema in
the recent merge window.

If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.

This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Will Deacon <will@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-clk@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-rtc@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210713193453.690290-1-robh@kernel.org
2021-07-15 08:45:27 -06:00
Linus Torvalds
e083bbd604 Merge tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Olof Johansson:
 "Like always, the DT branch is sizable. There are numerous additions
  and fixes to existing platforms, but also a handful of new ones
  introduced. Less than some other releases, but there's been
  significant work on cleanups, refactorings and device enabling on
  existing platforms.

  A non-exhaustive list of new material:

   - Refactoring of BCM2711 dtsi structure to add support for the
     Raspberry Pi 400

   - Rockchip: RK3568 SoC and EVB, video codecs for
     rk3036/3066/3188/322x

   - Qualcomm: SA8155p Automotive platform (SM8150 derivative),
     SM8150/8250 enhancements and support for Sony Xperia 1/1II and
     5/5II

   - TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc
     definitions

   - TI OMAP: Various cleanups

   - Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194

   - Qualcomm: lots of additions for peripherals across several SoCs,
     and new support for Microsoft Surface Duo (SM8150-based), Huawei
     Ascend G7.

   - i.MX: Numerous additions of features across SoCs and boards.

   - Allwinner: More device bindings for V3s, Forlinx OKA40i-C and
     NanoPi R1S H5 boards

   - MediaTek: More device bindings for mt8167, new Chromebook system
     variants for mt8183

   - Renesas: RZ/G2L SoC and EVK added

   - Amlogic: BananaPi BPI-M5 board added"

* tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits)
  arm64: dts: rockchip: add basic dts for RK3568 EVB
  arm64: dts: rockchip: add core dtsi for RK3568 SoC
  arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs
  ARM: dts: rockchip: add vpu and vdec node for RK322x
  ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188
  ARM: dts: rockchip: add vpu node for RK3036
  arm64: dts: ipq8074: Add QUP6 I2C node
  arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc
  arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc
  arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc
  arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly
  arm64: dts: rockchip: Sort rk3399 firefly pinmux entries
  arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly
  arm64: dts: rockchip: add SPDIF node for rk3399-firefly
  arm64: dts: rockchip: Add Rotation Property for OGA Panel
  arm64: dts: qcom: sc7180: bus votes for eMMC and SD card
  arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen
  arm64: dts: qcom: sm8250-edo: Enable GPI DMA
  arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI
  arm64: dts: qcom: sm8250-edo: Enable PCIe
  ...
2021-07-10 09:33:54 -07:00
Linus Torvalds
a70bb580bf Merge tag 'devicetree-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:

 - Refine reserved memory nomap handling

 - Merge some PCI and non-PCI address handling implementations

 - Simplify of_address.h header ifdefs

 - Improve printk handling of some 64-bit types

 - Convert adi,adv7511, Arm ccree, Arm SCMI, Arm SCU, Arm TWD timer, Arm
   VIC, arm,sbsa-gwdt, Arm/Amlogic SCPI, Aspeed I2C, Broadcom iProc PWM,
   linaro,optee-tz, MDIO GPIO, Mediatek RNG, MTD physmap, NXP
   pcf8563/pcf85263/pcf85363, Renesas TPU, renesas,emev2-smu,
   renesas,r9a06g032-sysctrl, sysc-rmobile, Tegra20 EMC, TI AM56 PCI, TI
   OMAP mailbox, TI SCI bindings, virtio-mmio, Zynq FPGA, and ZynqMP RTC
   to DT schema

 - Convert mux and mux controller bindings to schema. This includes MDIO
   IIO, and I2C muxes.

 - Add Arm PL031 RTC binding schema

 - Add vendor prefixes for StarFive Technology Co. Ltd. and Insignal Ltd

 - Fix some stale doc references

 - Remove stale property-units.txt. Superseded by schema in dt-schema
   repo.

 - Fixes for 'unevaluatedProperties' handling (enabled with experimental
   json-schema support)

 - Drop redundant usage of minItems and maxItems across the tree

 - Update some examples to use bindings with a schema

* tag 'devicetree-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (83 commits)
  dt-bindings: Fix 'unevaluatedProperties' errors in DT graph users
  dt-bindings: display: renesas,du: Fix 'ports' reference
  dt-bindings: media: adv7180: Add missing video-interfaces.yaml reference
  dt-bindings: crypto: ccree: Convert to json-schema
  dt-bindings: fpga: zynq: convert bindings to YAML
  dt-bindings: rtc: zynqmp: convert bindings to YAML
  dt-bindings: interrupt-controller: Convert ARM VIC to json-schema
  of: of_reserved_mem: mark nomap memory instead of removing
  of: of_reserved_mem: only call memblock_free for normal reserved memory
  dt-bindings: Drop redundant minItems/maxItems
  dt-bindings: spmi: Correct 'reg' schema
  of: reserved-memory: Add stub for RESERVEDMEM_OF_DECLARE()
  dt-bindings: clk: vc5: Fix example
  dt-bindings: timer: renesas,tmu: add r8a779a0 TMU support
  dt-bindings: drm: bridge: adi,adv7511.txt: convert to yaml
  dt-bindings: PCI: ti,am65: Convert PCIe host/endpoint mode dt-bindings to YAML
  of: Remove superfluous casts when printing u64 values
  of: Fix truncation of memory sizes on 32-bit platforms
  dt-bindings: rtc: nxp,pcf8563: Absorb pcf85263/pcf85363 bindings
  dt-bindings: pwm: Use examples with documented/matching schema
  ...
2021-07-03 10:54:08 -07:00
Linus Torvalds
19b4385922 Merge tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:

 - add support for OpeneEmbed SOM9331 board

 - Ingenic fixes/improvments

 - other fixes and cleanups

* tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (39 commits)
  MIPS: Fix PKMAP with 32-bit MIPS huge page support
  MIPS: CI20: Add second percpu timer for SMP.
  MIPS: CI20: Reduce clocksource to 750 kHz.
  MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
  dt-bindings: clock: Add documentation for MAC PHY control bindings.
  MIPS: X1830: Respect cell count of common properties.
  MIPS: set mips32r5 for virt extensions
  MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops
  MIPS: MT extensions are not available on MIPS32r1
  mips/kvm: Use BUG_ON instead of if condition followed by BUG
  MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource()
  MIPS: add PMD table accounting into MIPS'pmd_alloc_one
  MIPS: Loongson64: fix spelling of SPDX tag
  MIPS: ingenic: rs90: Add dedicated VRAM memory region
  MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio
  MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc
  MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
  MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs
  MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)
  MIPS: boot: Support specifying UART port on Ingenic SoCs
  ...
2021-07-01 17:03:11 -07:00
Linus Torvalds
514798d365 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "This round has a diffstat dominated by Qualcomm clk drivers. Honestly
  though that's just a bunch of data so the diffstat reflects that.
  Looking beyond that there's just a bunch of updates all around in
  various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors
  that have a lot of patches in here.

  Overall the driver changes look to be mostly enabling more clks and
  non-critical fixes that we could hold until the next merge window.

  I'm especially excited about the series from Arnd that graduates
  clkdev to be the only implementation of clk_get() and clk_put().
  That's a good step in the right direction to migreate eveerything over
  to the common clk framework. Now we don't have to worry about clkdev
  specific details, they're just part of the clk API now.

  Core:
   - clkdev is now the only option, i.e. clk_get()/clk_put() is
     implemented in only one place in the kernel instead of in
     drivers/clk/clkdev.c and in architectures that want their own
     implementation

  New Drivers:
   - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant
     Clock Jitter Cleaner With Dual Loop PLLs
   - Qualcomm MDM9607 GCC
   - Qualcomm SC8180X display clks
   - Qualcomm SM6125 GCC
   - Qualcomm SM8250 CAMCC (camera)
   - Renesas RZ/G2L SoC
   - Hisilicon hi3559A SoC

  Updates:
   - Stop using clock-output-names in ST clk drivers (yay!)
   - Support secure mode of STM32MP1 SoCs
   - Improve clock support for Actions S500 SoC
   - duty cycle setting support on qcom clks
   - Add TI am33xx spread spectrum clock support
   - Use determine_rate() for the Amlogic pll ops instead of
     round_rate()
   - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
   - Improve Amlogic axg-audio controller error on deferral
   - Add NNA clocks on Amlogic g12a
   - Reduce memory footprint of Rockchip PLL rate tables
   - A fix for the newly added Rockchip rk3568 clk driver
   - Exported clock for the newly added Rockchip video decoder
   - Remove audio ipg clock from i.MX8MP
   - Remove deprecated legacy clock binding for i.MX SCU clock driver
   - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
   - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif,
     audio, parallel interface)
   - Add dedicated clock ops for i.MX paralel interface
   - Different fixes for clocks controlled by ATF on i.MX SoCs
   - Add A53/A72 frequency scaling support i.MX clk-scu driver
   - Add special case for DCSS clock on suspend for i.MX clk-scu driver
   - Add parent save/restore on suspend/resume to i.MX clk-scu driver
   - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
   - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
     bindings
   - Tegra clk driver no longer deasserts resets on clk_enable as it
     gets in the way of certain power-up sequences
   - Fix compile testing for Tegra clk driver
   - One patch to fix a divider on the Allwinner v3s Audio PLL
   - Add support for CPU core clock boost modes on Renesas R-Car Gen3
   - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
   - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and
     improve support for multiple parents
   - Switch Renesas RZ/N1 divider clocks to .determine_rate()
   - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
   - Convert ar7 to common clk framework
   - Convert ralink to common clk framework"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits)
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  ...
2021-07-01 13:26:16 -07:00
周琰杰 (Zhou Yanjie)
2bc434b12d dt-bindings: clock: Add documentation for MAC PHY control bindings.
Update the CGU binding documentation, add mac-phy-ctrl as a
pattern property.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-06-30 14:37:16 +02:00
Stephen Boyd
d2b21013bf Merge branches 'clk-st', 'clk-si' and 'clk-hisilicon' into clk-next
- Stop using clock-output-names in ST clk drivers

* clk-st:
  dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
  clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
  dt-bindings: clock: st: clkgen-pll: add new introduced compatible
  clk: st: clkgen-pll: embed soc clock outputs within compatible data
  dt-bindings: clock: st: flexgen: add new introduced compatible
  clk: st: flexgen: embed soc clock outputs within compatible data
  clk: st: clkgen-pll: remove unused variable of struct clkgen_pll

* clk-si:
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  clk: si5341: Avoid divide errors due to bogus register contents
  clk: si5341: Wait for DEVICE_READY on startup
  dt-bindings: clock: clk-si5341: Add new attributes

* clk-hisilicon:
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
2021-06-29 13:33:42 -07:00
Stephen Boyd
4f47c91fc6 Merge branches 'clk-lmk04832', 'clk-stm', 'clk-rohm', 'clk-actions' and 'clk-ingenic' into clk-next
- Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
   Jitter Cleaner With Dual Loop PLLs
 - Support secure mode of STM32MP1 SoCs
 - Improve clock support for Actions S500 SoC

* clk-lmk04832:
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: lmk04832: add support for digital delay
  clk: add support for the lmk04832
  dt-bindings: clock: add ti,lmk04832 bindings

* clk-stm:
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: stm32mp1: move RCC reset controller into RCC clock driver
  clk: stm32mp1: convert to module driver
  clk: stm32mp1: remove intermediate pll clocks
  clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock
  clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock

* clk-rohm:
  clk: bd718xx: Drop BD70528 support

* clk-actions:
  clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC
  dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC
  clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC
  clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
  clk: actions: Fix SD clocks factor table on Owl S500 SoC
  clk: actions: Fix UART clock dividers on Owl S500 SoC

* clk-ingenic:
  clk: ingenic: Add support for the JZ4760
  clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
  clk: ingenic: Remove pll_info.no_bypass_bit
  clk: ingenic: Read bypass register only when there is one
  clk: Support bypassing dividers
  dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
2021-06-29 13:33:22 -07:00
Stephen Boyd
e51fbc55d3 Merge branches 'clk-rockchip', 'clk-amlogic', 'clk-yaml', 'clk-zynq' and 'clk-socfpga' into clk-next
* clk-rockchip:
  clk: rockchip: export ACLK_VCODEC for RK3036
  clk: rockchip: fix rk3568 cpll clk gate bits
  clk: rockchip: Optimize PLL table memory usage

* clk-amlogic:
  clk: meson: g12a: Add missing NNA source clocks for g12b
  clk: meson: axg-audio: improve deferral handling
  clk: meson: g12a: fix gp0 and hifi ranges
  clk: meson: pll: switch to determine_rate for the PLL ops

* clk-yaml:
  dt-bindings: clock: gpio-mux-clock: Convert to json-schema

* clk-zynq:
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: zynqmp: pll: Remove some dead code
  clk: zynqmp: fix compile testing without ZYNQMP_FIRMWARE

* clk-socfpga:
  clk: socfpga: clk-pll: Remove unused variable 'rc'
  clk: agilex/stratix10/n5x: fix how the bypass_reg is handled
  clk: agilex/stratix10: add support for the 2nd bypass
  clk: agilex/stratix10: fix bypass representation
  clk: agilex/stratix10: remove noc_clk
2021-06-29 13:33:16 -07:00
Stephen Boyd
d915611eda Merge branches 'clk-qcom', 'clk-versatile', 'clk-renesas', 'clk-sifive' and 'clk-ti' into clk-next
- duty cycle setting support on qcom clks
 - qcom MDM9607 GCC
 - qcom sc8180x display clks
 - qcom SM6125 GCC
 - Add TI am33xx spread spectrum clock support

* clk-qcom: (22 commits)
  clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare
  clk: qcom: Add camera clock controller driver for SM8250
  dt-bindings: clock: add QCOM SM8250 camera clock bindings
  clk: qcom: clk-alpha-pll: add support for zonda pll
  clk/qcom: Remove unused variables
  clk: qcom: smd-rpmcc: Add support for MSM8226 rpm clocks
  clk: qcom: gcc: Add support for Global Clock controller found on MSM8226
  dt-bindings: clock: qcom: Add MSM8226 GCC clock bindings
  clk: qcom: Add SM6125 (TRINKET) GCC driver
  dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
  clk: qcom: gcc: Add support for a new frequency for SC7280
  clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLK
  dt-bindings: clock: qcom: rpmcc: Document MSM8226 compatible
  clk: qcom: dispcc-sm8250: Add EDP clocks
  clk: qcom: dispcc-sm8250: Add sc8180x support
  clk: qcom: smd-rpm: De-duplicate identical entries
  clk: qcom: smd-rpm: Switch to parent_data
  clk: qcom: Add MDM9607 GCC driver
  dt-bindings: clock: Add MDM9607 GCC clock bindings
  clk: qcom: cleanup some dev_err_probe() calls
  ...

* clk-versatile:
  clk: versatile: Depend on HAS_IOMEM
  clk: versatile: remove dependency on ARCH_*

* clk-renesas: (22 commits)
  clk: renesas: Add support for R9A07G044 SoC
  clk: renesas: Add CPG core wrapper for RZ/G2L SoC
  dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
  dt-bindings: clock: Add r9a07g044 CPG Clock Definitions
  clk: renesas: r8a77995: Add ZA2 clock
  clk: renesas: cpg-mssr: Make srstclr[] comment block consistent
  clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitions
  clk: renesas: r9a06g032: Switch to .determine_rate()
  clk: renesas: div6: Implement range checking
  clk: renesas: div6: Consider all parents for requested rate
  clk: renesas: div6: Switch to .determine_rate()
  clk: renesas: div6: Simplify src mask handling
  clk: renesas: div6: Use clamp() instead of clamp_t()
  clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe()
  clk: renesas: r8a779a0: Add ISPCS clocks
  clk: renesas: rcar-gen3: Add boost support to Z clocks
  clk: renesas: rcar-gen3: Add custom clock for PLLs
  clk: renesas: rcar-gen3: Increase Z clock accuracy
  clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/
  clk: renesas: rcar-gen3: Remove superfluous masking in cpg_z_clk_set_rate()
  ...

* clk-sifive:
  clk: analogbits: fix doc warning in wrpll-cln28hpc.c
  clk: sifive: Fix kernel-doc

* clk-ti:
  drivers: ti: remove redundant error message in adpll.c
  clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk
  dt-bindings: clock: ehrpwm: Add support for AM64 specific compatible
  clk: ti: add am33xx/am43xx spread spectrum clock support
  ARM: dts: am43xx-clocks: add spread spectrum support
  ARM: dts: am33xx-clocks: add spread spectrum support
  dt-bindings: ti: dpll: add spread spectrum support
  clk: ti: fix typo in routine description
2021-06-29 13:32:46 -07:00
Gabriel Fernandez
94b7888b67 dt-bindings: clock: stm32mp1 new compatible for secure rcc
Introduce new compatible string "st,stm32mp1-rcc-secure" for
stm32mp1 clock driver when the device is configured with RCC
security support hardened.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210617051814.12018-11-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-28 16:09:10 -07:00
Dongjiu Geng
b87111da42 dt-bindings: Document the hi3559a clock bindings
Add DT bindings documentation for hi3559a SoC clock.

Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1616498973-47067-2-git-send-email-gengdongjiu1@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 20:05:41 -07:00
Robert Hancock
c832bb98d3 dt-bindings: clock: clk-si5341: Add new attributes
Add new silabs,xaxb-ext-clk and silabs,iovdd-33 properties.

Changed vdd-supply on top-level node to optional since it is not actually
used by the driver.

Removed vdd-supply from output sub-nodes, as it was not supported by the
driver and it is not easily possible to support this in that location with
the kernel regulator infrastructure. Changed to have vddoX-supply
attributes for each output on the top-level device node.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-2-robert.hancock@calian.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Alain Volmat
301035c32e dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
New compatible are added, supporting various kind of clkgen-fsyn
used for STiH407, STiH410 and STiH418

Signed-off-by: Alain Volmat <avolmat@me.com>
Link: https://lore.kernel.org/r/20210331201632.24530-8-avolmat@me.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:53:40 -07:00
Alain Volmat
8df309e9c5 dt-bindings: clock: st: clkgen-pll: add new introduced compatible
New compatible are added, supporting various kind of clkgen-pll
used for STiH407, STiH410 and STiH418

Signed-off-by: Alain Volmat <avolmat@me.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210331201632.24530-6-avolmat@me.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:53:39 -07:00
Alain Volmat
fa745c71b8 dt-bindings: clock: st: flexgen: add new introduced compatible
New compatible are added, supporting various kind of flexgen in
STiH407, STiH410 and STiH418

Signed-off-by: Alain Volmat <avolmat@me.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210331201632.24530-4-avolmat@me.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:53:39 -07:00
Paul Cercueil
2e1ae04f7f dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
Add ingenic,jz4760-cgu and ingenic,jz4760b-cgu compatible strings for
the JZ4760 and JZ4760B SoCs respectively.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210530164923.18134-2-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:49:17 -07:00
Liam Beguin
199ead4008 dt-bindings: clock: add ti,lmk04832 bindings
Document devicetree bindings for Texas Instruments' LMK04832.
The LMK04208 is a high performance clock conditioner with superior clock
jitter cleaning, generation, and distribution with JEDEC JESD204B
support.

Signed-off-by: Liam Beguin <lvb@xiphos.com>
Link: https://lore.kernel.org/r/20210423004057.283926-4-liambeguin@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 17:58:26 -07:00
Jonathan Marek
a3b82fa77b dt-bindings: clock: add QCOM SM8250 camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SM8250 SoC.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20210609022051.2171-3-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 17:12:55 -07:00
Bartosz Dudziak
e184d788af dt-bindings: clock: qcom: Add MSM8226 GCC clock bindings
Add compatible device strings and the include files for the MSM8226 GCC.

Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Link: https://lore.kernel.org/r/20210418122909.71434-2-bartosz.dudziak@snejp.pl
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 17:00:49 -07:00
Martin Botka
11fa5f8392 dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
Document the newly added SM6125 GCC driver.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210605121040.282053-1-martin.botka@somainline.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 16:53:25 -07:00
Geert Uytterhoeven
feb29cc744 dt-bindings: clock: gpio-mux-clock: Convert to json-schema
Convert the simple GPIO clock multiplexer Device Tree binding
documentation to json-schema.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/14cb3b4da446f26a4780e0bd1b58788eb6085d05.1623414619.git.geert+renesas@glider.be
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-25 15:41:58 -07:00