Commit Graph

704772 Commits

Author SHA1 Message Date
Kailang Yang
89542936df ALSA: hda/realtek - Update headset mode for ALC298
Dell new platform with new hardware layout.
Old headset mode policy will cause headset mode check type has a
chance to check fail.
So, we update new headset mode to match new hardware layout.
New headset mode policy also could suitable to old hardware layout.

Signed-off-by: Kailang Yang <kailang@realtek.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2017-07-17 11:12:57 +02:00
Claudiu Beznea
b2661357df ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support
Add specifig DTS files and bindings for sama5d27 SoM1 EK board.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-17 11:10:47 +02:00
Claudiu Beznea
af690fa37e ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
Add specific DTS file and bindings for sama5d27 SoM1 board.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-17 11:10:36 +02:00
Songjun Wu
68671d5fd1 ARM: dts: at91: sama5d2: add isc node
Add isc node, it conflicts with pdmic and uart3.

Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
[claudiu.beznea@microchip.com: place isc node after hlcdc node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-17 11:10:24 +02:00
Cyrille Pitchen
b23612d1e1 ARM: dts: at91: sama5d2: add QSPI nodes
This patch adds DT nodes for sama5d2 QSPI controllers.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[claudiu.beznea@microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-17 11:09:33 +02:00
fred gao
f43aa31fe7 drm/i915/gvt: Fix the vblank timer close issue after shutdown VMs in reverse
Once the Windows guest is shutdown, the display pipe will be disabled
and intel_gvt_check_vblank_emulation will be called to check if the
vblank timer is turned off. Given the scenario of creating VM1 ,VM2,
destoying VM2 in current code, VM1 has pipe enabled and continues to
check VM2, the flag have_enabled_pipe is always false since all the VM2
pipes are disabled, so the vblank timer will be canceled and TDR happens
in Windows VM1 guest due to the vsync timeout.

In this patch the vblank timer will be never canceled once one pipe is
enabled.

v2:
- remove have_enabled_pipe flag and check pipe enabled directly. (Zhenyu)

Cc: Wang Hongbo <hongbo.wang@intel.com>
Signed-off-by: fred gao <fred.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2017-07-17 17:09:04 +08:00
Takeshi Kihara
bf1a8aa0a2 pinctrl: sh-pfc: r8a7796: Rename CS1# pin function definitions
This patch renames the pin function macro definitions of the GPSR1 and
IPSR4 registers value for the CS1# pin.

This is a correction because GPSR and IPSR register specification for
R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:02:44 +02:00
Takeshi Kihara
78864ed5f3 pinctrl: sh-pfc: r8a7796: Fix IPSR and MOD_SEL register pin assignment for FSO pins group
This patch fixes IPSR{12,17,18} and MOD_SEL0 pin assignment for FSO pins
group.

This is a correction because GPSR and IPSR register specification for
R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:02:40 +02:00
Takeshi Kihara
e56c513a7a pinctrl: sh-pfc: r8a7796: Fix to delete MOD_SEL0 bit2 register definitions
This patch fixes the macro definitions of MOD_SEL0 bit2 register deleted.

This is a correction because MOD_SEL register specification for R8A7796
SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:02:40 +02:00
Takeshi Kihara
0a5e7370be pinctrl: sh-pfc: r8a7796: Fix to delete SATA_DEVSLP_B pins function definitions
This patch fixes the macro definitions of SATA_DEVSLP_B pins function
deleted.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:02:30 +02:00
Takeshi Kihara
8921778241 pinctrl: sh-pfc: r8a7796: Fix to delete FSCLKST pin and IPSR7 bit[15:12] register definitions
This patch fixes the macro definitions of FSCLKST pins function and IPSR7
bit[15:12] register deleted.

This is a correction because IPSR register specification for R8A7796 SoC
was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:02:27 +02:00
Takeshi Kihara
f21b4fca14 pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for TCLK{1,2}_{A,B} pins group
This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is
selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected
for IPSR17 bit[27:24].

This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:49 +02:00
Takeshi Kihara
6fb1870912 pinctrl: sh-pfc: r8a7796: Fix NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pin function definitions
This patch fixes the implementation incorrect of IPSR register value
definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:45 +02:00
Takeshi Kihara
5d26ee5172 pinctrl: sh-pfc: r8a7796: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions
This patch fixes the implementation incorrect of IPSR register value
definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:41 +02:00
Takeshi Kihara
dda7e6ce8e pinctrl: sh-pfc: r8a7796: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1 bit10
This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1
bit11 to MOD_SEL1 bit10.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:38 +02:00
Takeshi Kihara
04ee2ab395 pinctrl: sh-pfc: r8a7796: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
when SCK5_A pin function is selected for IPSR16 bit[31:28].

This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:33 +02:00
Takeshi Kihara
7aa36a334d pinctrl: sh-pfc: r8a7796: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_D
This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24]
value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24].

This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:12 +02:00
Geert Uytterhoeven
2bf147a836 pinctrl: sh-pfc: r8a7791: Add missing mmc_data8_b pin group
Pins D6 and D7 of the MMC interface can be muxed to two different sets
of pins, but currently only one set is supported.
Add a pin group for the alternative set to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Tested-by: Chris Paterson <chris.paterson2@renesas.com>
2017-07-17 11:01:11 +02:00
Geert Uytterhoeven
b6db6bfe71 pinctrl: sh-pfc: r8a7796: Fix MSIOF3 SS2_E mux
Fix a copy-and-paste bug in the MSIOF3 SS2_E mux array.

Fixes: 4753231cc9 ("pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 11:01:04 +02:00
Takeshi Kihara
1554b989e5 pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin
This patch fixes the IPSR register setting when the MSIOF3_SS1_E pin
function is selected.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 10:51:32 +02:00
Takeshi Kihara
7007019087 pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pin function definitions
This patch fixes the incorrect IPSR register value definitions for
MSIOF3_{SS1,SS2}_E pin functions.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 10:51:32 +02:00
Geert Uytterhoeven
3e6c7727c0 pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups and functions
Add pins, groups, and functions for MSIOF on R-Car H3 ES2.0.

Extracted from a big patch in the BSP by Takeshi Kihara, with
corrections for MSIOF3 SS1_E/SS2_E pins and SS2_E mux.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 10:51:31 +02:00
Takeshi Kihara
e2ab177076 pinctrl: sh-pfc: r8a7795: Fix MSIOF3_{SS1,SS2}_E pin function definitions
This patch fixes the incorrect IPSR register value definitions for
MSIOF3_{SS1,SS2}_E pin functions.

This is a correction to the incorrect implementation of IPSR register pin
assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car
Gen3 Hardware User's Manual Rev.0.53E.

Fixes: b205914c8f ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword, update Fixes for upstream]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 10:51:31 +02:00
Wolfram Sang
d0593c363f pinctrl: sh-pfc: Propagate errors on group config
On group configuration, bail out if setting one of the individual pins
fails. We don't need to roll-back, the pinctrl core will do this for us.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-07-17 10:50:17 +02:00
Arvind Yadav
1c18be5a4e EDAC: Constify attribute_group structures
attribute_groups are not supposed to change at runtime. All functions
working with attribute_groups provided by <linux/sysfs.h> work with
const attribute_group. So mark the non-const structs as const.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
CC: linux-edac@vger.kernel.org
Link: http://lkml.kernel.org/r/776cb8265509054abd01b0b551624cc0da3b88e7.1499078335.git.arvind.yadav.cs@gmail.com
Signed-off-by: Borislav Petkov <bp@suse.de>
2017-07-17 10:20:25 +02:00
Jan Kara
a992f2d38e ext2: Don't clear SGID when inheriting ACLs
When new directory 'DIR1' is created in a directory 'DIR0' with SGID bit
set, DIR1 is expected to have SGID bit set (and owning group equal to
the owning group of 'DIR0'). However when 'DIR0' also has some default
ACLs that 'DIR1' inherits, setting these ACLs will result in SGID bit on
'DIR1' to get cleared if user is not member of the owning group.

Fix the problem by creating __ext2_set_acl() function that does not call
posix_acl_update_mode() and use it when inheriting ACLs. That prevents
SGID bit clearing and the mode has been properly set by
posix_acl_create() anyway.

Fixes: 073931017b
CC: stable@vger.kernel.org
CC: linux-ext4@vger.kernel.org
Signed-off-by: Jan Kara <jack@suse.cz>
2017-07-17 10:15:31 +02:00
Jan Kara
6883cd7f68 reiserfs: Don't clear SGID when inheriting ACLs
When new directory 'DIR1' is created in a directory 'DIR0' with SGID bit
set, DIR1 is expected to have SGID bit set (and owning group equal to
the owning group of 'DIR0'). However when 'DIR0' also has some default
ACLs that 'DIR1' inherits, setting these ACLs will result in SGID bit on
'DIR1' to get cleared if user is not member of the owning group.

Fix the problem by moving posix_acl_update_mode() out of
__reiserfs_set_acl() into reiserfs_set_acl(). That way the function will
not be called when inheriting ACLs which is what we want as it prevents
SGID bit clearing and the mode has been properly set by
posix_acl_create() anyway.

Fixes: 073931017b
CC: stable@vger.kernel.org
CC: reiserfs-devel@vger.kernel.org
Signed-off-by: Jan Kara <jack@suse.cz>
2017-07-17 10:14:50 +02:00
Jack Pham
4a71fcb8ac usb: dwc3: gadget: only unmap requests from DMA if mapped
A recent optimization was made so that a request put on the
pending_list wouldn't get mapped for DMA until just before
preparing a TRB for it. However, this poses a problem in case
the request is dequeued or the endpoint is disabled before the
mapping is done as that would lead to dwc3_gadget_giveback()
unconditionally calling usb_gadget_unmap_request_for_dev() with
an invalid request->dma handle. Depending on the platform's DMA
implementation the unmap operation could result in a panic.

Since we know a successful mapping is a prerequisite for getting
a TRB, the unmap can be conditionally called only when req->trb
is non-NULL.

Fixes: cdb55b39fa ("usb: dwc3: gadget: lazily map requests for DMA")
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 11:01:27 +03:00
Geert Uytterhoeven
a9ef5c47d0 usb: gadget: udc: USB_SNP_CORE should depend on HAS_DMA
If NO_DMA=y:

    ERROR: "usb_gadget_map_request" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!
    ERROR: "dma_pool_destroy" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!
    ERROR: "usb_gadget_unmap_request" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!
    ERROR: "dma_pool_free" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!
    ERROR: "dma_pool_alloc" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!
    ERROR: "dma_pool_create" [drivers/usb/gadget/udc/snps_udc_core.ko] undefined!

As USB_SNP_CORE is selected by USB_SNP_UDC_PLAT and USB_AMD5536UDC,
these should depend on HAS_DMA, too.  For USB_AMD5536UDC, this is
already fulfilled through the dependency on USB_PCI (PCI implies
HAS_DMA).

Add dependencies on HAS_DMA to fix this.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 11:00:26 +03:00
Geert Uytterhoeven
f84a31eb98 usb: gadget: udc: USB_RENESAS_USB3 should depend on HAS_DMA
If NO_DMA=y:

    ERROR: "usb_gadget_map_request" [drivers/usb/gadget/udc/renesas_usb3.ko] undefined!
    ERROR: "usb_gadget_unmap_request" [drivers/usb/gadget/udc/renesas_usb3.ko] undefined!
    ERROR: "bad_dma_ops" [drivers/usb/gadget/udc/renesas_usb3.ko] undefined!

Add a dependency on HAS_DMA to fix this.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 11:00:22 +03:00
Axel Lin
bee9186943 usb: gadget: f_mass_storage: Fix the logic to iterate all common->luns
It is wrong to do --i in the for loop.

Fixes: dd02ea5a33 ("usb: gadget: mass_storage: Use static array for luns")
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Krzysztof Opasiak <k.opasiak@samsung.com>
Acked-by: Michal Nazarewicz <mina86@mina86.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 11:00:06 +03:00
Vignesh R
ee249b4554 usb: dwc3: omap: remove IRQ_NOAUTOEN used with shared irq
IRQ_NOAUTOEN cannot be used with shared IRQs, since commit 04c848d398
("genirq: Warn when IRQ_NOAUTOEN is used with shared interrupts") and
kernel now throws a warn dump. But OMAP DWC3 driver uses this flag. As
per commit 12a7f17fac ("usb: dwc3: omap: fix race of pm runtime with
irq handler in probe") that introduced this flag, PM runtime can race
with IRQ handler when deferred probing happens due to extcon,
therefore IRQ_NOAUTOEN needs to be set so that irq is not enabled until
extcon is registered.

Remove setting of IRQ_NOAUTOEN and move the registration of
shared irq to a point after dwc3_omap_extcon_register() and
of_platform_populate(). This avoids possibility of probe deferring and
above said race condition.

Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 10:59:31 +03:00
Vignesh R
541768b08a usb: dwc3: core: Call dwc3_core_get_phy() before initializing phys
commit f54edb539c ("usb: dwc3: core: initialize ULPI before trying to
get the PHY") moved call to dwc3_core_get_phy() from dwc3_probe() to
dwc3_core_init() after dwc3_core_soft_reset(). But
dwc3_core_soft_reset() calls phy_init(), therefore dwc3_core_get_phy()
needs to be called before dwc3_core_soft_reset().

Fix this by moving call to dwc3_core_get_phy() before
dwc3_core_soft_reset().

This fixes the following abort seen on DRA7xx platforms
[   24.769118] usb usb2: SerialNumber: xhci-hcd.1.auto
[   24.781144] hub 2-0:1.0: USB hub found
[   24.787836] hub 2-0:1.0: 1 port detected
[   24.809939] Unhandled fault: imprecise external abort (0x1406) at 0x00000000

Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2017-07-17 10:58:56 +03:00
Tony Lindgren
51ef70037e ARM: debug: Use generic 8250 debug_ll for am3517 and am335x
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:53:42 -07:00
Tony Lindgren
2d1f7d2e24 ARM: debug: Use generic 8250 debug_ll for ti81xx
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:51:46 -07:00
Tony Lindgren
fc23beb8a5 ARM: debug: Use generic 8250 debug_ll for omap3/4/5
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:49:08 -07:00
Tony Lindgren
d2b310b023 ARM: debug: Use generic 8250 debug_ll for omap2 and omap3/4/5 common uarts
We want to use generic 8250 debug_ll code to get DEBUG_UNCOMPRESS
working and to simplify the code. The old debug_ll code is no longer
needed and the machine ID based detection is no longer used.

Note that for most part there's no need to keep DEBUG_LL enabled.
We now have CONFIG_SERIAL_EARLYCON working very early as long as
the kernel cmdline has "earlycon" in it and the board specific dts
file has chosen configured with with the port using stdout-path.

Cc: Hoeun Ryu <hoeun.ryu@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-07-17 00:35:39 -07:00
Daniel Vetter
58947144af drm/i915: Update DRIVER_DATE to 20170717
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-07-17 09:06:19 +02:00
Jonathan Liu
2a596fc9d9 drm/sun4i: Implement drm_driver lastclose to restore fbdev console
The drm_driver lastclose callback is called when the last userspace
DRM client has closed. Call drm_fbdev_cma_restore_mode to restore
the fbdev console otherwise the fbdev console will stop working.

Fixes: 9026e0d122 ("drm: Add Allwinner A10 Display Engine support")
Cc: stable@vger.kernel.org
Tested-by: Olliver Schinagl <oliver@schinagl.nl>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jonathan Liu <net147@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-07-17 08:22:03 +02:00
Jonathan Liu
f0a3dd33ba drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus
The documentation for drm_do_get_edid in drivers/gpu/drm/drm_edid.c states:
"As in the general case the DDC bus is accessible by the kernel at the I2C
level, drivers must make all reasonable efforts to expose it as an I2C
adapter and use drm_get_edid() instead of abusing this function."

Exposing the DDC bus as an I2C adapter is more beneficial as it can be used
for purposes other than reading the EDID such as modifying the EDID or
using the HDMI DDC pins as an I2C bus through the I2C dev interface from
userspace (e.g. i2c-tools).

Implement this for A10s.

Signed-off-by: Jonathan Liu <net147@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-07-17 08:21:39 +02:00
Arvind Yadav
934d143192 drm/sun4i: constify drm_plane_helper_funcs
drm_plane_helper_funcs are not supposed to change at runtime.
All functions working with drm_plane_helper_funcs provided by
<drm/drm_plane_helper.h> work with const drm_plane_helper_funcs.
So mark the non-const structs as const.

File size before:
   text	   data	    bss	    dec	    hex	filename
    981	     40	      0	   1021	    3fd drivers/gpu/drm/sun4i/sun4i_layer.o

File size After adding 'const':
   text	   data	    bss	    dec	    hex	filename
   1021	      0	      0	   1021	    3fd drivers/gpu/drm/sun4i/sun4i_layer.o

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-07-17 08:21:33 +02:00
Yazen Ghannam
fbe63acf62 EDAC, mce_amd: Use cpu_to_node() to find the node ID
Using the homegrown amd_get_nb_id() to find a node ID on AMD was fine
while the L3 to node mapping was 1:1. And Zen topology broke this. So
let's start slowly moving away from it and use the topology interfaces
instead.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/1490041614-90057-2-git-send-email-Yazen.Ghannam@amd.com
[ Massage commit message. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
2017-07-17 07:01:08 +02:00
Chris Gorman
d1510a2e5a i2c: mux: pinctrl: mention correct module name in Kconfig help text
Kconfig says the resulting module is pinctrl-i2cmux, but the module when
built is i2c-mux-pinctrl.

Fixes: ae58d1e406 ("i2c: Add generic I2C multiplexer using pinctrl API")
Signed-off-by: Chris Gorman <chrisjohgorman@gmail.com>
Signed-off-by: Peter Rosin <peda@axentia.se>
2017-07-17 06:24:37 +02:00
David S. Miller
a288855151 Merge branch 'sctp-typedef-remove-part-2'
Xin Long says:

====================
sctp: remove typedefs from structures part 2

As we know, typedef is suggested not to use in kernel, even checkpatch.pl
also gives warnings about it. Now sctp is using it for many structures.

All this kind of typedef's using should be removed. This patchset is the
part 2 to remove it for another 11 basic structures.

Just as the part 1, No any code's logic would be changed in these patches,
only cleaning up.

Note that v1->v2, nothing changed, just because net-next were closed when
posting v1.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:15 -07:00
Xin Long
1474774a7f sctp: remove the typedef sctp_hmac_algo_param_t
This patch is to remove the typedef sctp_hmac_algo_param_t, and
replace with struct sctp_hmac_algo_param in the places where it's
using this typedef.

It is also to use sizeof(variable) instead of sizeof(type).

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00
Xin Long
a762a9d94d sctp: remove the typedef sctp_chunks_param_t
This patch is to remove the typedef sctp_chunks_param_t, and
replace with struct sctp_chunks_param in the places where it's
using this typedef.

It is also to use sizeof(variable) instead of sizeof(type).

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00
Xin Long
b02db702fa sctp: remove the typedef sctp_random_param_t
This patch is to remove the typedef sctp_random_param_t, and
replace with struct sctp_random_param in the places where it's
using this typedef.

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00
Xin Long
15328d9fee sctp: remove the typedef sctp_supported_ext_param_t
This patch is to remove the typedef sctp_supported_ext_param_t, and
replace with struct sctp_supported_ext_param in the places where it's
using this typedef.

It is also to use sizeof(variable) instead of sizeof(type).

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00
Xin Long
85f6bd24ac sctp: remove the typedef sctp_adaptation_ind_param_t
This patch is to remove the typedef sctp_adaptation_ind_param_t, and
replace with struct sctp_adaptation_ind_param in the places where it's
using this typedef.

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00
Xin Long
c1dd5df39b sctp: remove struct sctp_ecn_capable_param
Remove it, there is even no places using it.

Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-16 20:52:14 -07:00