The Tegra30 I2S driver currently allocates DMA FIFOs from the AHUB only
when an audio stream starts playback. This is theoretically nice for
resource sharing, but makes no practical difference for any configuration
the drivers currently support. However, this deferral prevents conversion
to the standard DMA DT bindings, since conversion requires knowledge of
the specific DMA channel to be allocated, which in turn depends on which
specific FIFO was allocated.
For this reason, move the FIFO allocation into probe() to allow later
conversion to the standard DMA DT bindings.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Call pm_runtime_get_sync() before all register accesses; the HW requires
clocks to be running when accessing registers.
This hasn't been needed to date, since all register IO was performed
while playback was active, and hence the ASoC core had already called
pm_runtime_get(). However, an imminent future commit will allocate and
set up the FIFOs and routing during probe(), when that "protection"
won't be in place.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.
This change also renames "clock"/"clk" to "modules"/"mod" in symbols
related to entries in configlink_clocks[], since:
- We don't care about clock handles any more, but rather reset handles,
so the old name isn't applicable.
- It really is a list of modules on the bus, about which we currently
only care about reset handles.
If we start caring about any other aspect of the modules in the future,
we won't have to rename all these symbols again.
Note: The addition of "depends COMMON_CLOCK" is something that was missing
before, not a new requirement.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
ASoC: dma: Generic ASoC dmaengine driver enhancements
This is the work so far on dmaengine for v3.14, it is being cross merged
into the Tegra tree to support a large DMA overhaul there. The main
additions are a change in the DMA request API which allows better
interaction at system startup using deferred probes and methods for
overriding the default device and channel names used to request DMA.
Check the return value of dma_request_slave_channel_reason() to see if
deferred probe happens, not the variable the return value will be
assigned to later.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Fixes: 5eda87b890 ("ASoC: dmaengine: support deferred probe for DMA channels")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Enhance dmaengine_pcm_request_chan_of() to support deferred probe for
DMA channels, by using the new dma_request_slave_channel_or_err() API.
This prevents snd_dmaengine_pcm_register() from succeeding without
acquiring DMA channels due to the relevant DMA controller not yet being
registered.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
AD1986A codec is a pretty old codec and has really many hidden
restrictions. One of such is that each DAC is dedicated to certain
pin although there are possible connections. Currently, the generic
parser tries to assign individual DACs as much as possible, and this
lead to two bad situations: connections where the sound actually
doesn't work, and connections conflicting other channels.
We may fix this by trying to find the best connections more harder,
but as of now, it's easier to give some hints for paired DAC/pin
connections and honor them if available, since such a hint is needed
only for specific codecs (right now only AD1986A, and there will be
unlikely any others in future).
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64971
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=66621
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
In case a single HDA card has both HDMI and S/PDIF outputs, the S/PDIF
outputs will have their IEC958 controls created starting from index 16
and the HDMI controls will be created starting from index 0.
However, HDMI simple_playback_build_controls() as used by old VIA and
NVIDIA codecs incorrectly requests the IEC958 controls to be created
with an S/PDIF type instead of HDMI.
In case the card has other codecs that have HDMI outputs, the controls
will be created with wrong index=16, causing them to e.g. be unreachable
by the ALSA "hdmi" alias.
Fix that by making simple_playback_build_controls() request controls
with HDMI indexes.
Not many cards have an affected configuration, but e.g. ASUS M3N78-VM
contains an integrated NVIDIA HDA "card" with:
- a VIA codec that has, among others, an S/PDIF pin incorrectly
labelled as an HDMI pin, and
- an NVIDIA MCP7x HDMI codec.
Reported-by: MysterX on #openelec
Tested-by: MysterX on #openelec
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: <stable@vger.kernel.org> # 3.8+
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Treat both negative and zero return values from clk_round_rate()
as errors. This is needed since subsequent patches will convert
clk_round_rate()'s return value to be an unsigned type, rather
than a signed type, since some clock sources can generate rates higher
than (2^31)-1 Hz.
Eventually, when calling clk_round_rate(), only a return value of
zero will be considered a error; all other values will be
considered valid rates. The comparison against values less than
0 is kept to preserve the correct behavior in the meantime.
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Treat both negative and zero return values from clk_round_rate()
as errors. This is needed since subsequent patches will convert
clk_round_rate()'s return value to be an unsigned type, rather
than a signed type, since some clock sources can generate rates higher
than (2^31)-1 Hz.
Eventually, when calling clk_round_rate(), only a return value of
zero will be considered a error. All other values will be
considered valid rates. The comparison against values less than
0 is kept to preserve the correct behavior in the meantime.
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Not all channels have been initialized, so far, especially when aamix
NID itself doesn't have amps but its leaves have. This patch fixes
these holes. Otherwise you might get unexpected loopback inputs,
e.g. from surround channels.
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Optional DT property to specify the desired parent clock for the McASP fck
clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
An earlier patch overlooked this when the compatible has been changed from
omap2 -> am33x.
Rename omap2_mcasp_pdata to am33xx_mcasp_pdata.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Instead of passing __iomem address (mcasp->base + register_offset) pass
the main mcasp structure and only access the mcasp->base in the low level
IO functions.
In most cases this helps with code readability and it will make it easier
to switch over to regmap in the future.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The IP in DRA7xx is similar to the IP found in TI81xxAM3xxx/AM4xxx type of
SoCs but it is is integrated with sDMA instead of eDMA. The suitable pcm
driver for DRA7xx is the omap-pcm driver which is using dmaengine.
In the driver we can configure both dma related structures used for eDMA and
sDMA. The only thing we need to make sure that we set the correct dma_data
at startup with snd_soc_dai_set_dma_data()
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In synchronous mode both transmit and receive sections are using the TX
clocks. In setup like this the TX clocks need to be enabled when capture
is running.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The audio data to/from McASP can be sent/received via two method:
Via the data port (preferred) or via the configuration bus.
Currently the driver assumes that all data communication will be done via
the data port.
This patch adds support for selecting the configuration port as data
interface.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The FIFO registers base address is different in dm646x compared to newer
SoCs with McASP IP. Instead of using two paths (switch/case) to handle the
difference we can simply pick the correct base address beforehand and use
offsets to address the register we need to configure.
With this change the indentation depth can be reduced as well.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Replace mcasp->base use with plain base in the davinci_mcasp_set_dai_fmt()
function since it has been already used by the remaining part of the function.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Rename the private struct from davinci_audio_dev to davinci_mcasp.
Change the local use of the pointer to this struct from *dev to *mcasp.
The aim is to have better readable code for the first look since having
dev->xxxx in the code when using the local private struct is a bit
surprising.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
It brings no benefit to inline this function due to it's size and function.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Since it is a private struct strictly used by the davinci-mcasp driver it
can be moved from header file to the source file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
It is better for readability to have the register definitions out from the
source file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Specify the dai formats to use within the snd_soc_dai_link structures. In
this way we can remove the code dealing with the dai format configuration
from the machin driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
AM43xx have the same McASP IP as AM33xx and both platform uses eDMA. Modify
the Kconfig so it will be possible to add audio support for AM43xx based
boards later.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
We have several boards using the same machine driver for audio support.
All of these machines can select a generic machine driver config option to
build the needed driver while keeping the config options used within the
driver for compile time code path selection.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The help text is misleading and the prompt itself explains the purpose of
this config section.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add fields to struct snd_dmaengine_pcm_config to allow custom:
- DMA channel names.
This is useful when the default "tx" and "rx" channel names don't
apply, for example if a HW module supports multiple channels, each
having different DMA channel names. This is the case with the FIFOs
in Tegra's AHUB. This new facility can replace
SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME.
- DMA device
This allows requesting DMA channels for a device other than the device
which is registering the "PCM" driver. This is quite unusual, but is
currently useful on Tegra. In much HW, and in Tegra20, each DAI HW
module contains its own FIFOs which DMA writes to. However, in Tegra30,
the DMA FIFOs were split out AHUB HW module, which then routes the data
through a cross-bar, and into the DAI HW modules. However, the current
ASoC driver structure does not expose this detail, and acts as if the
FIFOs are still part of the DAI HW modules. Consequently, the "PCM"
driver is registered with the DAI HW module, yet the DMA channels must
be looked up in the AHUB HW module's device tree node. This new config
field allows that to happen. Eventually, the Tegra drivers will be
reworked to fully expose the AHUB, and this config field can be
removed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
If snd_dmaengine_pcm_register()'s call to snd_soc_add_platform() fails,
all objects allocated during registration are leaked. Fix this by adding
error-handling code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Restructure the internals of dmaengine_pcm_request_chan_of() as a loop
over all channels to be allocated. This makes it easier to add logic
that applies to all allocated channels, without having to duplicate that
logic in each of the half-duplex/full-duplex paths.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
if codec driver is used for AIC3X_MODEL_3007 the mono iout controls overwrite
registers for class-d amplifier.
classd amplifier controls are only used for AIC3X_MODEL_3007.
Removing all mono snd_kcontrol_new, snd_soc_dapm_widget, snd_soc_dapm_route
and aic3x_init stuff from common code and call only for not AIC3X_MODEL_3007
codecs.
Testet only with AIC3X_MODEL_3007
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds a ASoC driver for the AXI-SPDIF softcore. The core implements a
simple SPDIF transmitter and is used on some Analog Devices' reference designs
for various FPGA platforms. For now the driver only support the PL330 as the the
DMA controller.
The driver uses the generic PCM dmaengine driver for its PCM. The only
restriction is that we need to set the SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag as
the dmaengine driver for the DMA core (PL330) that is used with this core has no
residue reporting capabilities yet. This will be fixed in the future though.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch adds support for the AXI-I2S softcore. The core implements a simple
bidirectional I2S transceiver and is used by Analog Devices in some of their
reference designs for various FPGA platforms.
The driver uses the generic PCM dmaengine driver for its PCM. The only
restriction is that we need to set the SND_DMAENGINE_PCM_FLAG_NO_RESIDUE flag as
the dmaengine driver for the DMA core (PL330) that is used with this core has no
residue reporting capabilities yet. This will be fixed in the future though.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
If we update it here, the set_bias_level() of Codec driver won't be normally
called and we will then miss some essential procedures in set_bias_level() of
the Codec driver. Thus drop it.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
In tegra*_i2s_set_fmt(), in the (fmt == SND_SOC_DAIFMT_CBM_CFM) case,
"val" is never assigned to, but left uninitialized. The other case does
initialized it. Fix this by initializing val at the start of the
function, and only ever ORing into it.
Update the handling of "mask" so it works the same way for consistency.
Update tegra20_spdif.c to use the same code-style for consistency, even
though it doesn't happen to suffer from the same problem at present.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Fixes: 0f163546a7 ("ASoC: tegra: use regmap more directly")
Cc: <stable@vger.kernel.org>
Since there are more HD-audio compatible codecs, move the definitions
of HD-audio verbs into common header location, include/sound, so that
it can be included cleanly from other drivers than HD-audio driver.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
AD and VIA codecs had stereo mixer input enabled as default before
moving to the generic parser, and people think the lack of such a
regression. In this patch, the stereo mixer input is added back to
the input selection if no auto-mic is available, and if it's not
disabled explicitly via hint. This should satisfy most of demands,
i.e. stereo mix on desktop machines like what it worked before, and it
still keeps the new auto-mic feature on laptops.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Sometimes the hardware reports LPIB being advanced than POSBUF.
When this happens, the driver adjusts to a positive value by adding
the buffer size. Then the driver detects it as an error (greater than
the period size), and stops the LPIB delay account from this point
on.
When I took a close look at these conditions, the values shown are all
very small numbers, and it'd be better to just ignore these values
instead of discontinuing the LPIB delay correction.
In this patch, the driver checks a negative delay value and ignores if
it's a significantly small error. Currently the threshold is set to
64 frames, but could be smaller.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The loopback mixing paths aren't initialized correctly at init
callback. Mostly this is harmless as codecs usually set the mute
state as default, but we still should make sure.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
