Commit Graph

106767 Commits

Author SHA1 Message Date
Arnd Bergmann
9dfa92ec40 ARM: EXYNOS: Enable multi-platform build support
This makes it possible to enable the Exynos platform as part of a
multiplatform kernel.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:43:51 +09:00
Sachin Kamat
9a1013285f ARM: EXYNOS: Consolidate Kconfig entries
Instead of repeating the Kconfig entries for every SoC,
move them under ARCH_EXYNOS3, 4 and 5 and move the entries
common to 3, 4 and 5 under ARCH_EXYNOS.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:43:50 +09:00
Tarek Dakhran
723c9c7e16 ARM: EXYNOS: Add support for EXYNOS5410 SoC
EXYNOS5410 is SoC in Samsung's Exynos5 SoC series.
Add initial support for this SoC.

Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:43:49 +09:00
Chanwoo Choi
6457158acc ARM: EXYNOS: Support secondary CPU boot of Exynos3250
This patch fix the offset of CPU boot address and don't
need to send smc call of SMC_CMD_CPU1BOOT command for
secondary CPU boot because Exynos3250 removes WFE in
secure mode.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:43:38 +09:00
Bjorn Helgaas
617b4157a5 Merge branches 'pci/host-exynos', 'pci/host-imx6', 'pci/resource' and 'pci/misc' into next
* pci/host-exynos:
  PCI: exynos: Fix add_pcie_port() section mismatch warning

* pci/host-imx6:
  PCI: imx6: Add support for MSI
  PCI: designware: Make MSI ISR shared IRQ aware
  PCI: imx6: Remove optional (and unused) IRQs
  PCI: imx6: Drop old IRQ mapping
  PCI: imx6: Use new clock names
  PCI: imx6: Fix imx6_add_pcie_port() section mismatch warning

* pci/resource:
  i82875p_edac: Assign PCI resources before adding device

* pci/misc:
  ARM/PCI: Call pcie_bus_configure_settings() to set MPS
  PCI: Make pci_bus_add_device() void

Conflicts:
	drivers/edac/i82875p_edac.c
2014-05-30 11:41:17 -06:00
Chanwoo Choi
940bc58de5 ARM: EXYNOS: Add Exynos3250 SoC ID
This patch add Exynos3250's SoC ID. Exynos 3250 is SoC that
is based on the 32-bit RISC processor for Smartphone.
Exynos3250 uses Cortex-A7 dual cores and has a target speed
of 1.0GHz.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:37:23 +09:00
Arun Kumar K
86c6f1488d ARM: EXYNOS: Add 5800 SoC support
Exynos5800 is an octa core SoC which is based on the 5420
platform. This patch adds the basic support for it in the
mach-exynos.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:37:16 +09:00
Pankaj Dubey
ed08f10397 ARM: EXYNOS: initial board support for exynos5260 SoC
This patch add basic arch side support for exynos5260 SoC.
Note that this is required to enable build for clock driver.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:37:09 +09:00
Kukjin Kim
fced6dee29 Merge branch 'v3.16-next/cleanup-samsung' into v3.16-next/platform-exynos 2014-05-31 02:36:49 +09:00
Chanwoo Choi
25023926a2 ARM: dts: add pmu sysreg node to exynos3250
This patch add pmusysreg node for Exynos3250 to access PMU
(Power Management Unit) register in a centralized way using
syscon driver.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:22:19 +09:00
Arun Kumar K
2c3b655c4a ARM: dts: correct the usb phy node in exynos5800-peach-pi
The vbus-supply property is wrongly updated in the
usbdrd node instead of the usbdrd_phy node. This patch
fixes the same.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:11:42 +09:00
Arun Kumar K
0ce9f47ab5 ARM: dts: correct the usb phy node in exynos5420-peach-pit
The vbus-supply property is wrongly updated in the
usbdrd node instead of the usbdrd_phy node. This patch
fixes the same.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:11:39 +09:00
Tarek Dakhran
107e6aad98 ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
Add initial device tree nodes for EXYNOS5410 SoC and SMDK5410 board.

Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:18 +09:00
Tomasz Figa
5a992a9c98 ARM: dts: add dts files for exynos3250 SoC
This patch adds new exynos3250.dtsi to support Exynos3250 SoC
based on Cortex-A7 dual core and includes following dt nodes:

- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
- sysram node for SYSRAM memory mapping

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Hyunhee Kim <hyunhee.kim@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:17 +09:00
Arun Kumar K
f82785a92c ARM: dts: add mfc node for exynos5800
Adds the mfc node to exynos5800 which uses MFCv8.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:17 +09:00
Vivek Gautam
d3343157bb ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
Add required fixed-regulator for VBUS supply for USB 3.0
controller phy.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:16 +09:00
Rahul Sharma
4c2d3f384c ARM: dts: enable fimd for exynos5800-peach-pi
Enable FIMD for peach-pi board.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:15 +09:00
Rahul Sharma
8b2f8379bb ARM: dts: enable display controller for exynos5800-peach-pi
Enable display controller with timing information for 1080p
panel in Exynos5800 peach-pi board.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:14 +09:00
Rahul Sharma
6a7da0d48f ARM: dts: enable hdmi for exynos5800-peach-pi
Enable hdmi for peach-pi board.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:13 +09:00
Arun Kumar K
853d2694ed ARM: dts: add dts file for exynos5800-peach-pi board
Adds support for google peach-pi board having the
Exynos5800 SoC.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:12 +09:00
Arun Kumar K
2ccd0b53da ARM: dts: add dts file for exynos5800 SoC
Most of the nodes of exynos5420 remains same for exynos5800.
So the exynos5420.dtsi is included in exynos5800 and the changed
node properties will be overriden.

Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:11 +09:00
Rahul Sharma
72f1da0185 ARM: dts: add dts file for exynos5260-xyref5260 board
The patch adds the dts file for xyref5260 board which
is based on exynos5260 SoC.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:10 +09:00
Rahul Sharma
16d7ff2642 ARM: dts: add dts files for exynos5260 SoC
The patch adds the dts files for exynos5260.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:09:04 +09:00
Sachin Kamat
64f5d1eb85 ARM: dts: update watchdog node name in exynos5440
Made it as per DT node naming convention <name@reg_addr>.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:06:54 +09:00
Sachin Kamat
2d7a5bd9d6 ARM: dts: use key code macros on Origen and Arndale boards
Key code macros improve readability on exnos4210-origen,
exynos4412-origen and exynos5250-arndale boards.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[kgene.kim@samsung.com: squashed similar two patches]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:06:51 +09:00
Sachin Kamat
db0706790b ARM: dts: enable RTC and WDT nodes on Origen boards
Enabled RTC and WDT nodes on exynos4210-origen and
exynos4412-origen boards.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
[kgene.kim@samsung.com: squashed similar two patches]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-31 02:06:37 +09:00
Murali Karicheri
8b5742ad15 ARM/PCI: Call pcie_bus_configure_settings() to set MPS
Call pcie_bus_configure_settings() on ARM, like for other platforms.
pcie_bus_configure_settings() makes sure the MPS across the bus is uniform
and provides the ability to tune the MRSS and MPS to higher performance
values.  This is particularly important for embedded where there is no
firmware to program these PCIe settings for the OS.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
CC: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-05-30 10:50:57 -06:00
Lorenzo Pieralisi
9358d755bd arm64: kernel: initialize broadcast hrtimer based clock event device
On platforms implementing CPU power management, the CPUidle subsystem
can allow CPUs to enter idle states where local timers logic is lost on power
down. To keep the software timers functional the kernel relies on an
always-on broadcast timer to be present in the platform to relay the
interrupt signalling the timer expiries.

For platforms implementing CPU core gating that do not implement an always-on
HW timer or implement it in a broken way, this patch adds code to initialize
the kernel hrtimer based clock event device upon boot (which can be chosen as
tick broadcast device by the kernel).
It relies on a dynamically chosen CPU to be always powered-up. This CPU then
relays the timer interrupt to CPUs in deep-idle states through its HW local
timer device.

Having a CPU always-on has implications on power management platform
capabilities and makes CPUidle suboptimal, since at least a CPU is kept
always in a shallow idle state by the kernel to relay timer interrupts,
but at least leaves the kernel with a functional system with some working
power management capabilities.

The hrtimer based clock event device is unconditionally registered, but
has the lowest possible rating such that any broadcast-capable HW clock
event device present will be chosen in preference as the tick broadcast
device.

Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-05-30 17:48:13 +01:00
Olof Johansson
da98f44f27 Merge tag 'renesas-fixes-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/fixes-non-critical
Merge "Renesas ARM Based SoC Fixes for v3.16" from Simon Horman:

This corrects a bug that will be introduced in v3.15.
The bug causes audio playback to fail on the Armadillo800 EVA board.

* tag 'renesas-fixes-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: armadillo800eva: fixup HDMI sound flags setting

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-30 09:23:35 -07:00
Maciej W. Rozycki
06947aaaf9 MIPS: Implement random_get_entropy with CP0 Random
Update to commit 9c9b415c50 [MIPS:
Reimplement get_cycles().]

On systems were for whatever reasons we can't use the cycle counter, fall
back to the c0_random register as an entropy source.  It has however a
very small range that makes it suitable for random_get_entropy only and
not get_cycles.

This optimised version compiles to 8 instructions in the fast path even in
the worst case of all the conditions to check being variable (including a
MFC0 move delay slot that is only required for very old processors):

     828:	8cf90000 	lw	t9,0(a3)
			828: R_MIPS_LO16	jiffies
     82c:	40057800 	mfc0	a1,c0_prid
     830:	3c0200ff 	lui	v0,0xff
     834:	00a21024 	and	v0,a1,v0
     838:	1040007d 	beqz	v0,a30 <add_interrupt_randomness+0x22c>
     83c:	3c030000 	lui	v1,0x0
			83c: R_MIPS_HI16	cpu_data
     840:	40024800 	mfc0	v0,c0_count
     844:	00000000 	nop
     848:	00409021 	move	s2,v0
     84c:	8ce20000 	lw	v0,0(a3)
			84c: R_MIPS_LO16	jiffies

On most targets the sequence will be shorter and on some it will reduce to
a single `MFC0 <reg>,c0_count', as all MIPS architecture (i.e. non-legacy
MIPS) processors require the CP0 Count register to be present.

The only known exception that reports MIPS architecture compliance, but
contrary to that lacks CP0 Count is the Ingenic JZ4740 thingy.  For broken
platforms like that this code requires cpu_has_counter to be hardcoded to
0 (i.e. no variable setting is permitted) so as not to penalise all the
other good platforms out there.

The asm barrier is required so that the compiler does not pull any
potentially costly (cold cache!) `cpu_data' variable access into the fast
path.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Theodore Ts'o <tytso@mit.edu>
Cc: John Crispin <blogic@openwrt.org>
Cc: Andrew McGregor <andrewmcgr@gmail.com>
Cc: Dave Taht <dave.taht@bufferbloat.net>
Cc: Felix Fietkau <nbd@nbd.name>
Cc: Simon Kelley <simon@thekelleys.org.uk>
Cc: Jim Gettys <jg@freedesktop.org>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6702/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 18:21:30 +02:00
H. Peter Anvin
c9e5a5a703 x86/xsave: Make it clear that the XSAVE macros use (%edi)/(%rdi)
The XSAVE instruction family takes a memory argment.  The macros use
(%edi)/(%rdi) as that memory argument - make that clear to the reader.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1401387164-43416-7-git-send-email-fenghua.yu@intel.com
2014-05-30 08:19:21 -07:00
Ganesan Ramalingam
fedfcb1137 MIPS: Netlogic: XLP9XX on-chip SATA support
The XLP9XX SoC has an on-chip SATA controller with two ports. Add
ahci-init-xlp2.c to initialize the controller, setup the glue logic
registers, fixup PCI quirks and setup interrupt ack logic.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6913/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:51:47 +02:00
Ganesan Ramalingam
a951440971 MIPS: Netlogic: Support for XLP3XX on-chip SATA
XLP3XX includes an on-chip SATA controller with 4 ports. The
controller needs glue logic initialization and PCI fixup before
it can be used with the standard AHCI driver.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:51:25 +02:00
Ganesan Ramalingam
d66f3f0e10 MIPS: Add MSI support for XLP9XX
In XLP9XX, the interrupt routing table for MSI-X has been moved to the
PCIe controller's config space from PIC. There are also 32 MSI-X
interrupts available per link on XLP9XX.

Update XLP MSI/MSI-X code to handle this.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: g@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6912/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:51:02 +02:00
Yonghong Song
1c98398662 MIPS: Netlogic: Add support for XLP5XX
Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.

Signed-off-by: Yonghong Song <ysong@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:50:38 +02:00
Jayachandran C
edf3ed5e69 MIPS: Netlogic: Update XLP9XX/2XX core freq calculation
Calculate XLP 9XX and 2XX core frequency from the per-core PLL. This
should give the correct value for all board configurations.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6870/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:50:13 +02:00
Ganesan Ramalingam
c065909e47 MIPS: Netlogic: PIC freq calculation for XLP 9XX/2XX
Update PIC frequency calculation for XLP9XX and 2XX processors using
the correct PLL registers. This should work for all possible board
configurations.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:49:41 +02:00
Jayachandran C
77bef0e4b5 MIPS: Netlogic: Fix XLP9XX pic entry
Add the compatible property to the PIC entry. Also fix up the nodename
to use the correct address.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6869/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:49:21 +02:00
Jayachandran C
5874743ea8 MIPS: Netlogic: Use PRID_IMP_MASK macro
Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor
type.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:49:02 +02:00
Jayachandran C
0d57eba02d MIPS: Netlogic: IRQ mapping for some more SoC blocks
Add IRQ to IRT (PIC interupt table index) mapping for SATA, GPIO, NAND
and SPI interfaces on the XLP SoC. Fix offsets for few blocks and add
device IDs for a few blocks.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6911/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:48:42 +02:00
Jayachandran C
e9126418dd MIPS: Netlogic: Enable access to more than 64GB
The ELPA bit needs to be set in the PAGEGRAIN register to enable
access to >64GB physical address. Update reset.S to do this from
every hardware thread.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:48:25 +02:00
Jayachandran C
a3deecfaa3 MIPS: Netlogic: Reduce size of reset code
Update thread wakeup function to use scratch registers for saving SP and
RA. Move the register restore code needed for thread 0 to the calling
function. This reduces the size of code copied to the reset vector.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6910/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:47:56 +02:00
Jayachandran C
2e240ddd09 MIPS: Netlogic: Use cpumask_scnprintf for wakeup_mask
Use standard function to print cpumask. Also fixup a typo in the same
file.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: g@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6909/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:47:36 +02:00
Jayachandran C
9de10ffb54 MIPS: Netlogic: Warn on invalid irq
Warn and return if invalid IRQ is passed to nlm_set_pic_extra_ack.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6862/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:46:07 +02:00
Jayachandran C
3e468567c2 MIPS: Netlogic: Move coremask setup to nlm_node_init
This is needed for nlm_node_present(0) to work on uniprocessor compile.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6861/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:45:19 +02:00
Jayachandran C
f9fab7e4ed MIPS: Netlogic: Fix uniprocessor compilation
The macros in topology.h need CONFIG_SMP, and the uniprocessor compilation
fails due to this. Wrap the macros in an ifdef so that uniprocessor works.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6863/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:44:55 +02:00
Jayachandran C
a91796a919 MIPS: Support upto 256 CPUs
This is needed for two node XLP9xx configurations.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:44:36 +02:00
Markos Chandras
3f5fdb4bd1 MIPS: Enable the BPF_JIT symbol for MIPS
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6743/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 16:10:20 +02:00
Markos Chandras
c6610de353 MIPS: net: Add BPF JIT
This adds initial support for BPF-JIT on MIPS

Tested on mips32 LE/BE and mips64 BE/n64 using
dhcp, ping and various tcpdump filters.

Benchmarking:

Assuming the remote MIPS target uses 192.168.154.181
as its IP address, and the local host uses 192.168.154.136,
the following results can be obtained using the following
tcpdump filter (catches no frames) and a simple
'time ping -f -c 1000000' command.

[root@(none) ~]# tcpdump -p -n -s 0 -i eth0 net 10.0.0.0/24 -d
(000) ldh      [12]
(001) jeq      #0x800           jt 2	jf 8
(002) ld       [26]
(003) and      #0xffffff00
(004) jeq      #0xa000000       jt 16	jf 5
(005) ld       [30]
(006) and      #0xffffff00
(007) jeq      #0xa000000       jt 16	jf 17
(008) jeq      #0x806           jt 10	jf 9
(009) jeq      #0x8035          jt 10	jf 17
(010) ld       [28]
(011) and      #0xffffff00
(012) jeq      #0xa000000       jt 16	jf 13
(013) ld       [38]
(014) and      #0xffffff00
(015) jeq      #0xa000000       jt 16	jf 17
(016) ret      #65535

- BPF-JIT Disabled

real    1m38.005s
user    0m1.510s
sys     0m6.710s

- BPF-JIT Enabled

real    1m35.215s
user    0m1.200s
sys     0m4.140s

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-05-30 16:10:20 +02:00
Markos Chandras
8248881835 MIPS: uasm: Add lb uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-05-30 16:10:19 +02:00