Commit Graph

39134 Commits

Author SHA1 Message Date
Tomasz Figa
76fe98b900 ARM: dts: Keep eMMC regulators soft-disabled for exynos4412-trats2
In MAX77686 PMIC two regulators dedicated for eMMC memory can be
controlled both by I2C interface and a GPIO pin, with the resulting
regulator state being a logical OR of both. Since the GPIO control is
used both by the kernel and the lowest level bootloader at reset, the
regulator should be disabled by I2C control to allow it to be turned off
by GPIO control.

This patch removes regulator-always-on properties from both regulators
and, while at it, also unsupported regulator-mem-off.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Naveen Krishna Chatradhi
65354307c1 ARM: dts: correct the mmc0 capability string for exynos Peach boards
MMC capability for HS200 is parsed in mmc/core/host.c as
dts string "mmc-hs200-1_8v".

This patch corrects the dts string for Exynos5420 based peach-pit
and Exynos5800 based peach-pi boards.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:41 +09:00
Javier Martinez Canillas
90fbb382da ARM: dts: Add rtc_src clk for s3c-rtc on exynos5250-snow
commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC")
added an "rtc_src" DT property for the Samsung's S3C Real Time Clock
controller that specifies the 32.768 kHz clock that uses the RTC as
its source clock. In the case of the Exynos5250 based Snow board, the
Maxim 77686 32kHz AP clock is used as the source clock.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Javier Martinez Canillas
fa781ddab9 ARM: dts: Add rtc_src clk for s3c-rtc on exynos Peach boards
commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC")
added an "rtc_src" DT property for the Samsung's S3C Real Time Clock
controller that specifies the 32.768 kHz clock that uses the RTC as
its source clock. In the case of the Peach Pit and Pi machines, the
Maxim 77802 32kHz AP clock is used as the source clock.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Tomasz Figa
5e794de514 ARM: dts: Enable PWM node by default for s3c64xx
The PWM block is required for system clock source so it must be always
enabled. This patch fixes boot issues on SMDK6410 which did not have
the node enabled explicitly for other purposes.

Fixes: eeb93d02 ("clocksource: of: Respect device tree node status")

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
53dd4138bb ARM: dts: Add exynos5250-spring device tree
Adds initial support for the HP Chromebook 11.

Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Stephan van Schaik <stephan@synkhronix.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
ceb5b5deaf ARM: dts: Simplify USB3503 on exynos5250-arndale
There's no need for a simple-bus, place the smsc,usb3503a directly into
the root node. That's what we're going to do on exynos5250-spring.

Reported-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
e79bfe1244 ARM: dts: Fix apparent GPIO typo in exynos5250-arndale
The GPIO flag 2 has no constant assigned, so this was probably
active-low.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:40 +09:00
Andreas Faerber
c71335e7e8 ARM: dts: Clean up exynos5250-arndale
Use the new style of referencing inherited nodes, use symbolic names,
tidy indentation and reorder includes.

Goal is the alignment of all exynos5250 based device trees for
comparison.

Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
adca3e614e ARM: dts: Clean up exynos5250-smdk5250
Use the new style for referencing inherited nodes and use symbolic
names. Goal is the alignment of all exynos5250 based device trees
for comparison.

Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased and squashed]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
5140e29d67 ARM: dts: Fill in bootargs for exynos5250-snow
exynos5250-cros-common.dtsi had an empty /chosen node.
Fill in exemplary boot arguments.

Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
ca5423e8b2 ARM: dts: Clean up exynos5250-snow
Use the new style of referencing inherited nodes and use symbolic
names. Reorder one pinctrl node in GPIO order.
Goal is the alignment of all exynos5250 based device trees for
comparison.

Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased and squashed]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Andreas Faerber
19fd45bf5f ARM: dts: Prepare node labels for exynos5250
Allows them to be extended by reference.

Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:12:39 +09:00
Krzysztof Kozlowski
b588aaec6d ARM: EXYNOS: SWRESET is needed to boot secondary CPU on exynos3250
Without software reset the secondary CPU does not power up and
exynos_boot_secondary() ends with pen_release equal to 1. This can be
observed in dmesg:
	CPU1: failed to come online
	Brought up 1 CPUs
	SMP: Total of 1 processors activated.
	CPU: All CPU(s) started in SVC mode.

When booting the secondary CPU on Exynos3250 execute also software
reset for core 1.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
0d713cf1a6 ARM: EXYNOS: Fix build with PM_SLEEP=n and ARM_EXYNOS_CPUIDLE=y
Fix building of exynos_defconfig with CONFIG_PM_SLEEP disabled and
CONFIG_ARM_EXYNOS_CPUIDLE enabled by:

* adding EXYNOS_CPU_SUSPEND config option
* always building sleep.o
* building pm.o if EXYNOS_CPU_SUSPEND is enabled
* moving suspend specific code from pm.c to suspend.c
* enabling pm-common.o build also for EXYNOS_CPU_SUSPEND option

[ Please note that there are no changes in the code moved from pm.c
  to suspend.c except making few functions non-static and cleaning
  up includes. ]

Also while at it update Copyright dates.

The build error messages:
drivers/built-in.o: In function `exynos_enter_core0_aftr':
/home/bzolnier/linux/drivers/cpuidle/cpuidle-exynos.c:36: undefined reference to `cpu_suspend'
arch/arm/mach-exynos/built-in.o:(.data+0x74): undefined reference to `exynos_enter_aftr'
make: *** [vmlinux] Error 1

This patch has been tested on Exynos4210 based Origen board.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
42d5dc3786 ARM: EXYNOS: allow driver usage on Exynos4x12 SoCs
Register cpuidle platform device on Exynos4x12 SoCs allowing EXYNOS
cpuidle driver usage on these SoCs.

AFTR mode reduces power consumption on Trats2 board (Exynos4412 SoC
with secure firmware enabled) by ~12% when EXYNOS cpuidle driver is
enabled (in both cases the default exynos_defconfig config is used
and CPU1-3 are offlined).

Currently Exynos4412 SoC support is limited to Trats2 board.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
c2dd114d24 ARM: EXYNOS: fix register setup for AFTR mode code
Add S5P_CENTRAL_SEQ_OPTION register setup to cpuidle AFTR mode code
by moving the relevant code from exynos_pm_suspend() (used only by
suspend) to exynos_pm_central_suspend() (used by both suspend and
AFTR).  Without this setup AFTR mode doesn't show any benefit over
WFI one (at least on Exynos4412 SoC).  When this setup is applied
AFTR mode reduces power consumption by ~12% (as measured on Trats2
board).

This change is a preparation for adding secure firmware support to
EXYNOS cpuidle driver.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
a135e20185 ARM: EXYNOS: add secure firmware support to AFTR mode code
* Move cp15 registers saving to exynos_save_cp15() helper and add
  additional helper usage to do_idle firmware method.

* Use resume firmware method instead of exynos_cpu_restore_register()
  and skip exynos_cpu_save_register() on boards with secure firmware
  enabled.

* Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default
  ones used by exynos_cpu_set_boot_vector() on boards with secure
  firmware enabled.

* Use do_idle firmware method instead of cpu_do_idle() on boards with
  secure firmware enabled.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:36 +09:00
Bartlomiej Zolnierkiewicz
0b7778a801 ARM: firmware: add AFTR mode support to firmware do_idle method
On some platforms (i.e. EXYNOS ones) more than one idle mode is
available and we need to distinguish them in firmware do_idle method.

Add mode parameter to do_idle firmware method and AFTR mode support
to EXYNOS do_idle implementation.

This change is a preparation for adding secure firmware support to
EXYNOS cpuidle driver.

This patch shouldn't cause any functionality changes.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Bartlomiej Zolnierkiewicz
134abc297e ARM: EXYNOS: replace EXYNOS_BOOT_VECTOR_* macros by static inlines
Replace EXYNOS_BOOT_VECTOR_ADDR and EXYNOS_BOOT_VECTOR_FLAG macros
by exynos_boot_vector_addr() and exynos_boot_vector_flag() static
inlines.

This patch shouldn't cause any functionality changes.

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Tomasz Figa
2b9d9c321b ARM: EXYNOS: Add support for firmware-assisted suspend/resume
On a numer of Exynos-based boards Linux kernel is running in non-secure
mode under a secure firmware. This means that certain operations need to
be handled in special way, with firmware assistance. System-wide
suspend/resume is an example of such operations.

This patch adds support for firmware-assisted suspend/resume by
leveraging recently introduced suspend and resume firmware operations
and modifying existing suspend/resume paths to account for presence of
secure firmware.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: rebased]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Tomasz Figa
9c261f89a3 ARM: firmware: Introduce suspend and resume operations
This patch extends the firmware_ops structure with two new callbacks:
.suspend() and .resume(). The former is intended to ask the firmware to
save all its volatile state and suspend the system, without returning
back to the kernel in between. The latter is to be called early by
very low level platform suspend code after waking up to restore low
level hardware state, which can't be restored in non-secure mode.

While at it, outdated version of the structure is removed from the
documentation and replaced with a reference to the header file.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Vikas Sajjan
066da1ae52 ARM: EXYNOS: Refactor the pm code to use DT based lookup
Refactoring the pm.c to avoid using "soc_is_exynos" checks,
instead use the DT based lookup.

While at it, consolidate the common code across SoCs
and create static helper functions.

Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Vikas Sajjan
32ed35ff22 ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c
Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to
make way for refactoring of pm.c and to create common functions across
exynos4 and exynos5250.

Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:35 +09:00
Krzysztof Kozlowski
13cfa6c4f7 ARM: EXYNOS: Fix CPU idle clock down after CPU off
On Exynos4 USE_DELAYED_RESET_ASSERTION must be set in
ARM_COREx_OPTION register during CPU power down. This is the proper way
of powering down CPU on Exynos4.

Additionally on Exynos4212 without this the CPU clock down feature won't
work after powering down some CPU and the online CPUs will work at full
frequency chosen by CPUfreq governor.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Krzysztof Kozlowski
27b9ee852c ARM: EXYNOS: Remove unneeded __ref annotation for cpu_die function
The __ref annotation for exynos_cpu_die() is not needed because the
function does not reference any __init/__exit symbol or call.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Krzysztof Kozlowski
6f0b7c0c6f ARM: EXYNOS: Move code from hotplug.c to platsmp.c
Cleanup a little the SMP/hotplug code for Exynos by:
1. Moving completely all functions from hotplug.c into the platsmp.c;
2. Deleting the hotplug.c file.

After recent cleanups (e.g. 75ad2ab28f "ARM: EXYNOS: use
v7_exit_coherency_flush macro for cache disabling") there was only CPU
power down related code in hotplug.c file.

Rationale behind the code movement and benefits:
1. The file platsmp.c is the only user of code located in hotplug.c.
   Keeping code in hotplug.c required declaring exynos_cpu_die() in common.h.
   Such dependencies and mentioned exynos_cpu_die() declaration can be
   removed.
2. In next patches exynos_set_delayed_reset_assertion() will be
   introduced. This function will be called by:
    - cpu_leave_power (hotplug.c),
    - platform_do_lowpower (hotplug.c),
    - exynos_boot_secondary (platsmp.c).

Merging hotplug.c into platsmp.c leads to simpler and cleaner code with
less dependencies between files.

The commit only moves code around with one additional observable change:
the hotplug.c was compiled with custom CFLAGS (-march=armv7-a). These
CFLAGS are not necessary any more.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-10-21 00:06:22 +09:00
Wolfram Sang
5e641f9f5b ARM: plat-samsung: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:07 +02:00
Wolfram Sang
848ceb1b85 ARM: plat-pxa: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:07 +02:00
Wolfram Sang
67cfdbc4dc ARM: mach-u300: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:06 +02:00
Wolfram Sang
666672065a ARM: mach-sa1100: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:06 +02:00
Wolfram Sang
fb33e22476 ARM: mach-s3c24xx: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:06 +02:00
Wolfram Sang
a961f40ee1 ARM: mach-pxa: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:05 +02:00
Wolfram Sang
ea18faf9f6 ARM: mach-prima2: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:05 +02:00
Wolfram Sang
ceb8ef2e20 ARM: mach-omap2: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:04 +02:00
Wolfram Sang
a46ca32ca0 ARM: mach-msm: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:03 +02:00
Wolfram Sang
f2633f8a53 ARM: mach-imx: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:03 +02:00
Wolfram Sang
7246c72de2 ARM: mach-davinci: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:02 +02:00
Wolfram Sang
d155fc759a ARM: common: drop owner assignment from platform_drivers
A platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-20 16:20:02 +02:00
Michal Simek
2329efbbca ARM: zynq: DT: trivial: Fix mc node
sed -i 's/}\ ;/};/g'

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:20:17 +02:00
Michal Simek
6714297b1b ARM: zynq: DT: Add cadence watchdog node
Add the cadence watchdog node to the Zynq devicetree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:20:16 +02:00
Michal Simek
6c7ba4157b ARM: zynq: DT: Add missing reference for memory-controller
Add missing reference for memory-controller.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:20:09 +02:00
Michal Simek
70472c4328 ARM: zynq: DT: Add missing reference for ADC
Add missing reference for ADC node.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:19:17 +02:00
Michal Simek
8abef06b63 ARM: zynq: DT: Add missing address for L2 pl310
By in sync with others node and add also baseaddr
to the node name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:19:10 +02:00
Soren Brinkmann
e8b397754a ARM: zynq: DT: Remove 222 MHz OPP
Due to dependencies between timer and CPU frequency, only changes by
powers of two are allowed. The clocksource driver prevents other
changes, but with cpufreq and its governors it can result in being
spammed with error messages constantly. Hence, remove the 222 MHz OPP.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:14:20 +02:00
Soren Brinkmann
b5241fb1ca ARM: zynq: DT: Fix GEM register area size
The size of the GEM's register area is only 0x1000 bytes.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-10-20 15:14:20 +02:00
Chen-Yu Tsai
f49a430c14 ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-20 14:52:12 +02:00
Chen-Yu Tsai
4ab328f06e ARM: dts: sunxi: Add Allwinner A80 dtsi
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and
4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core
PowerVR G6230 GPU.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-20 14:52:12 +02:00
Iain Paton
35669b39f1 ARM: sun7i: add support for A20-OLinuXino-Lime2
This adds support for the Olimex A20-OLinuXino-Lime2
https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXIno-LIME2

Differences to previous Lime boards are 1GB RAM and gigabit ethernet

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-20 14:52:11 +02:00
Hans de Goede
f9554fb476 ARM: dts: sun7i: Add Mele M3 board
The Mele M3 is yet another Allwinnner based Android top set box from Mele.

It uses a housing similar to the A2000, but without the USM sata storage slot
at the top.

It features an A20 SoC, 1G RAM, 4G eMMC (unique for Allwinner devices),
100Mbit ethernet, HDMI out, 3 USB A receptacles, VGA, and A/V OUT connections.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-20 14:52:11 +02:00