ARM: sirf: machine update for 3.15 from Barry Song:
Most of the below are some minor fixes for coding style. "ARM: prima2:
move to generic reset controller driver framework" has been ready near
3.14 merge window, but it was late to merge in 3.14, so move this one
to 3.15.
* tag 'sirf-soc-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: prima2: move to generic reset controller driver framework
ARM: prima2: staticize sirfsoc_init_late function
ARM: prima2: rtciobrg: fix the typo about license
ARM: prima2: common: fix checkpatch issues
ARM: prima2: platsmp: fix checkpatch issues
ARM: prima2: l2x0: fix checkpatch issues
Signed-off-by: Olof Johansson <olof@lixom.net>
A set of device tree-related cleanups for the ux500 platform from Linus
Walleij:
- Rename SSP/SPI clocks to the name found in the hardware
reference manual. (Also includes a rename in the U300
device tree file.)
- Delete dead non-DT code.
- Drop now completely unused GPIO definition header file.
- Delete all hardcoded IRQ number assignments. This hits
MFD a bit so the patch has been ACKed by Lee Jones from
the MFD side.
* tag 'ux500-dt-v3.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
mfd: dbx500/abx500: root out hardcoded IRQ assignments
ARM: ux500: drop a chunk of GPIO definitions
ARM: ux500: skip GIC CPU and dist address checks
ARM: ux500: delete pointless DT config option
ARM: u300: switch SSP/SPI clock name to "SSPCLK"
ARM: ux500: switch SSP/SPI clock name to "SSPCLK"
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung exynos clock related DT updates for v3.15 from Kukjim Kim:
- use macros instead of hard coded numbers for clock bindings
NOTE: this is based on v3.15-next/dt-samsung
* tag 'exynos-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: use macros in clock bindings for exynos5440
ARM: dts: use macros in clock bindings for exynos5420
ARM: dts: use macros in clock bindings for exynos5250
ARM: dts: use macros in clock bindings for exynos4
Samsung DT updates for v3.15 from Kukjin Kim:
For exynos4412
- update vdd_arm voltage range for odroidx board
For exynos5250
- add PMU sysreg node and update watchdog node
- re-organize RTC status
- add max77686 pmic node for smdk5250
For exynos5420
- add PMU sysreg, i2s, adma and watchdog nodes
- re-organize RTC status
- add fixed voltage regulators and regulator nodes
for smdk5420
- add PMIC, GPIO based wake up key and vmmc-supply
support for arndale-octa board
* tag 'samsung-dt' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add vmmc-supply to MMC on arndale-octa board
ARM: dts: Add wake up key to arndale-octa board
ARM: dts: Add PMIC support to arndale-octa board
ARM: dts: Add fixed voltage regulators to smdk5420
ARM: dts: Add I2S nodes to exynos5420
ARM: dts: Add ADMA node to exynos5420
ARM: dts: Re-organize RTC status for exynos5250
ARM: dts: Re-organize RTC status for exynos5420
ARM: dts: Add regulator entries to smdk5420
ARM: dts: add max77686 pmic node for smdk5250
ARM: dts: update vdd_arm voltage range for exynos4412 based boards
ARM: dts: update watchdog device nodes for exynos5250 and exynos5420
ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420
Signed-off-by: Olof Johansson <olof@lixom.net>
From Tony Lindgren:
Two omap3430 vs 3630 device tree regression fixes for
issues booting 3430 based boards.
* tag 'omap-for-v3.14/fixes-dt-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3-gta04: Add ti,omap36xx to compatible property to avoid problems with booting
ARM: dts: omap3-igep: fix boot fail due wrong compatible match
Signed-off-by: Olof Johansson <olof@lixom.net>
* integrator/multiplatform-base:
ARM: integrator: select GPIO block
ARM: integrator: register the IM-PD1 VIC
ARM: integrator: use managed resources for the IM-PD1
irqchip: support cascaded VICs
irqchip: vic: update the base IRQ member correctly
clk: versatile: respect parent rate in ICST clock
clk: versatile: pass a parent to the ICST clock
ARM: integrator: switch to fetch clocks from device tree
ARM: SP804: make Integrator/CP timer pick clock from DT
ARM: integrator: define clocks in the device trees
Merge 'bcm pinctrl rename' From Christin Daudt:
Rename pinctrl dt binding to restore consistency with other bcm mobile
bindings.
* tag 'bcm-for-3.14-pinctrl-reduced-rename' of git://github.com/broadcom/bcm11351:
pinctrl: Rename Broadcom Capri pinctrl binding
pinctrl: refer to updated dt binding string.
Update dtsi with new pinctrl compatible string
+ Linux 3.14-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner fixes from Maxime Ripard:
Two fixes for device trees additions that got added in 3.14. One fixes the
interrupt types of some IPs, the other fixes up a compatible that got
introduced during 3.14
* tag 'sunxi-fixes-for-3.14' of https://github.com/mripard/linux:
ARM: sunxi: dt: Change the touchscreen compatibles
ARM: sun7i: dt: Fix interrupt trigger types
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"A number of ARM updates for -rc, covering mostly ARM specific code,
but with one change to modpost.c to allow Thumb section mismatches to
be detected.
ARM changes include reporting when an attempt is made to boot a LPAE
kernel on hardware which does not support LPAE, rather than just being
silent about it.
A number of other minor fixes are included too"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 7992/1: boot: compressed: ignore bswapsdi2.S
ARM: 7991/1: sa1100: fix compile problem on Collie
ARM: fix noMMU kallsyms symbol filtering
ARM: 7980/1: kernel: improve error message when LPAE config doesn't match CPU
ARM: 7964/1: Detect section mismatches in thumb relocations
ARM: 7963/1: mm: report both sections from PMD
Commit 017f161a55 (ARM: 7877/1: use built-in byte swap function) added
bswapsdi2.{o,S} to arch/arm/boot/compressed/Makefile, but didn't update
the .gitignore. Thus after a a build git status shows bswapsdi2.S as a
new file, which is a little annoying.
This patch updates arch/arm/boot/compressed/.gitignore to ignore
bswapsdi2.S, as we already do for ashldi3.S and others.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch connects IPU and display encoder (HDMI, LVDS, MIPI)
device tree nodes, as well as parallel displays on the DISP0
and DISP1 outputs, using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt
The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.
Each encoder with an associated input multiplexer has multiple
input ports in the device tree. The order and reg property of
the ports must correspond to the multiplexer input order.
Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and encoders or panels have to be added.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch connects IPU and display encoder (VGA, LVDS)
device tree nodes, as well as parallel displays on the DISP0
and DISP1 outputs, using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt
The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.
Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and encoders or panels have to be added.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch connects IPU and and parallel display device tree
nodes using the OF graph bindings described in
Documentation/devicetree/bindings/media/video-interfaces.txt
The IPU ports correspond to the two display interfaces. The
order of endpoints in the ports is arbitrary.
Since the imx-drm node now only needs to contain links to the
display interfaces, it can be moved to the SoC dtsi level. At
the board level, only connections between the display interface
ports and panels have to be added.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fixes the Television Encoder node's DDC I2C bus property to
use the common property name of 'ddc-i2c-bus' instead of just 'ddc'.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The A31 Colombus board has 3 I2C controllers that should be usable. However,
the first one is not working for some reason on the hardware I have been able
to test it on, while it should really be the same controller. Enable the i2c1
and i2c2 busses, and mark i2c0 as in failure in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The i2c controllers have a few muxing options on the A31. Enable the
ones found in the A31 Colombus board.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has 4 I2C controllers that are the same than the one in the
other Allwinner SoCs, except for the fact that they are asserted in
reset by the reset unit.
Add these i2c controllers to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marvell Dove's pinctrl does require some PMU regs for muxing PMU
functions to MPP pins. Recently, a discussion started about consolidating
Power Management Unit (PMU) into a single DT node. As we don't want
anymore DT ABI in the way, drop the corresponding reg property from
pinctrl node now. The driver will derive the registers from existing
reg properties.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 385 RD board is the reference design board from Marvell
for the Armada 385 SoC. This commit adds a Device Tree description for
this board, which enables the following features:
* Network interfaces
* I2C bus
* Serial port
* SPI bus, with a SPI flash
* PCIe interface
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On Armada 385 DB, while the "rgmii" PHY connection mode works fine
with the generic PHY driver, it fails to work when the Marvell PHY
driver is enabled in the kernel configuration, due to a finer handling
of the PHY configuration. This is due to the fact that the phy
connection mode should instead be "rgmii-id", i.e with the TX/RX delay
mechanisms enabled.
This fixes the network operation on Armada 385 DB with
CONFIG_MARVELL_PHY=y. Without this patch and this option enabled, one
would only get messages such as:
mvneta f1070000.ethernet eth1: bad rx status 0cc10000 (crc error), size=70
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since the Armada XP Matrix board has 4 GB of RAM and not 2 GB, we
update the Device Tree to take into account the correct amount of
memory. As noted in the new comment, the last 256 MB of RAM are in
fact not usable, due to the overlap with the MBus Window address
range.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Marvell has now provided bootloaders that are Device Tree capable for
the Armada XP GP board, and that also remap the internal register base
address to 0xf1000000. In addition, the bootloader now sets the MBus
Window base address to 0xf0000000, which allows to use much more RAM
in the last GB of RAM before the 4 GB limit (the entire space from
0xC0000000 to 0xFFFFFFFF was not usable due to being used for I/O, not
only the space from 0xF0000000 to 0xFFFFFFFF is used for I/O).
Therefore this commit:
* Updates the memory->reg Device Tree property with the fact that in
the first bank of RAM, memory up to 0xf0000000 can be used.
* Updates the soc->ranges Device Tree property with the fact that the
internal registers are now mapped at 0xf1000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Marvell has now provided bootloaders that are Device Tree capable for
the Armada XP DB board, and that also remap the internal register base
address to 0xf1000000. In addition, the bootloader now sets the MBus
Window base address to 0xf0000000, but on this board, this change
doesn't make much difference since the board is by default equipped
with 2 GB of RAM.
Therefore this commit updates the soc->ranges Device Tree property
with the fact that the internal registers are now mapped at
0xf1000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The latest Marvell bootloaders for various boards change the MBus
Window base address from 0xC0000000 to 0xF0000000, in order to make
more RAM in the first 4 GB actually usable by the kernel (RAM that is
covered by the MBus window is "shadowed" and therefore not usable).
However, our default PCIe memory and I/O apertures where sitting at
0xe0000000 (for memory) and 0xe8000000 (for I/O), which will now be
outside of the MBus Window range on those platforms. To make things
work, we have to ensure those apertures use addresses in the
0xF0000000 -> 0xFFFFFFFF range.
Of course this change of the MBus Window base address from 0xC0000000
to 0xF0000000 also comes with a change of the internal register base
address from 0xD0000000 to 0xF1000000.
We have therefore designed the following memory map:
* 0xF0000000 -> 0xF1000000: 16 MB, used for NOR flashes on Armada XP
GP and Armada XP DB.
* 0xF1000000 -> 0xF1100000: 1 MB, used for internal registers.
* 0xF8000000 -> 0xFFE00000: 126 MB, used for PCIe memory.
* 0xFFE00000 -> 0xFFF00000: 1 MB, used for PCIe I/O.
* 0xFFF00000 -> 0xFFFFFFFF: 1 MB, used for the BootROM mapping
There is one exception to this layout: the Armada XP OpenBlocks, which
has a 128 MB NOR flash, mapped from 0xF0000000 to 0xF8000000. This
does not conflict with the current change for the PCIe I/O and memory
apertures, and continues to work because on Armada XP OpenBlocks, the
bootloader is an old one, and continues to have internal registers
mapped at 0xD0000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Tegra124 can support 4GB of RAM. With that much RAM (plus some memory-
mapped IO peripherals), more than 32-bits of physical address space is
required. Hence, convert all Tegra124 DTs to use 2 DT cells for address
space.
(I think this was suggested by Olof Johansson, but I'm not 100% sure)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
EVM board provides two Ethernet ports, this patch sets them into
dual_emac mode to provide two independent network interfaces.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add ABB device nodes for DRA7 family of devices. Data is based on
DRA7 Technical Reference Manual revision I (Sept 2013)
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add ABB device nodes for OMAP443x family of devices. abb_iva is
populated, but disabled as it is not used on current OMAP443x family,
but the node is used on OMAP446x family. Data is based on OMAP443x
Technical Reference Manual revision AN (April 2013).
ABB device nodes for OMAP4460 device Data is based on OMAP4460
Technical Reference Manual revision Z (April 2013)
[nm@ti.com: co-developer]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add ABB device node for OMAP36xx family of devices. Data is based on
OMAP36XX Technical Reference Manual revision AB (Dec 2012).
[nm@ti.com: co-developer]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add card detect gpio for SD card slot and include dt gpio header.
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Added device tree bindings for dwc3, usb2 and usb3 PHYs. The documentation
of these can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt
and Documentation/devicetree/bindings/phy/ti-phy.txt.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The BCM11351 BRT board will never see the light of day. Remove the BRT
dts since it is not maintainable.
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
The OMAP EHCI and OHCI controllers are not compatible with drivers
other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get
rid of the incompatible ids.
CC: Alan Stern <stern@rowland.harvard.edu>
CC: Nishant Menon <nm@ti.com>
CC: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The necessary clock phandle for the EHCI clock is now provided
via device tree so we no longer need this legacy method.
Update the omap4-panda and omap5-uevm board DTS to provide the
necessary EHCI PHY clock information.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Gumstix DuoVero is an OMAP4430-based Computer On Module.
Parlor is one of the available expansion board.
Tested features:
- GPMC ethernet
- HSUSB2 and OTG
- Audio out
- WiFi and Bluetooth (w2cbw0015 SDIO module)
- LED and button
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Tony Lindgren <tony@atomide.com>
