Pull char/misc driver patches from Greg KH:
"Here's the big char/misc driver updates for 3.15-rc1.
Lots of various things here, including the new mcb driver subsystem.
All of these have been in linux-next for a while"
* tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (118 commits)
extcon: Move OF helper function to extcon core and change function name
extcon: of: Remove unnecessary function call by using the name of device_node
extcon: gpio: Use SIMPLE_DEV_PM_OPS macro
extcon: palmas: Use SIMPLE_DEV_PM_OPS macro
mei: don't use deprecated DEFINE_PCI_DEVICE_TABLE macro
mei: amthif: fix checkpatch error
mei: client.h fix checkpatch errors
mei: use cl_dbg where appropriate
mei: fix Unnecessary space after function pointer name
mei: report consistently copy_from/to_user failures
mei: drop pr_fmt macros
mei: make me hw headers private to me hw.
mei: fix memory leak of pending write cb objects
mei: me: do not reset when less than expected data is received
drivers: mcb: Fix build error discovered by 0-day bot
cs5535-mfgpt: Simplify dependencies
spmi: pm: drop bus-level PM suspend/resume routines
spmi: pmic_arb: make selectable on ARCH_QCOM
Drivers: hv: vmbus: Increase the limit on the number of pfns we can handle
pch_phub: Report error writing MAC back to user
...
Pull pin control bulk changes from Linus Walleij:
"Pin control bulk changes for the v3.15 series, no new core
functionality this time, just incremental driver updates:
- A large refactoring of the MVEBU (Marvell) driver.
- A large refactoring of the Tegra (nVidia) driver.
- GPIO interrupt including soft edges support in the STi driver.
- Misc updates to PFC (Renesas), AT91, ADI2 (Blackfin),
pinctrl-single, sirf (CSR), msm (Qualcomm), Exynos (Samsung), sunxi
(AllWinner), i.MX (Freescale), Baytrail"
* tag 'pinctrl-v3.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: tegra: add some missing Tegra114 entries
pinctrl: tegra: fix some mistakes in Tegra124
pinctrl: msm: fix up out-of-order merge conflict
pinctrl: st: Fix error check for of_irq_to_resource usage
pinctrl: tegra: consistency cleanup
pinctrl: tegra: dynamically calculate function list of groups
pinctrl: tegra: init Tegra20/30 at module_init time
pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delays
pinctrl: st: add pinctrl support for the STiH407 SoC
pinctrl: st: Enhance the controller to manage unavailable registers
pinctrl: msm: Simplify msm_config_reg() and callers
pinctrl: msm: Remove impossible WARN_ON()s
pinctrl: msm: Replace lookup tables with math
pinctrl: msm: Drop OF_IRQ dependency
pinctrl: msm: Drop unused includes
pinctrl: msm: Check for ngpios > MAX_NR_GPIO
pinctrl: msm: Silence recursive lockdep warning
pinctrl: mvebu: silence WARN to dev_warn
pinctrl: msm: drop wake_irqs bitmap
pinctrl-baytrail: add function mux checking in gpio pin request
...
Pull irq code updates from Thomas Gleixner:
"The irq department proudly presents:
- Another tree wide sweep of irq infrastructure abuse. Clear winner
of the trainwreck engineering contest was:
#include "../../../kernel/irq/settings.h"
- Tree wide update of irq_set_affinity() callbacks which miss a cpu
online check when picking a single cpu out of the affinity mask.
- Tree wide consolidation of interrupt statistics.
- Updates to the threaded interrupt infrastructure to allow explicit
wakeup of the interrupt thread and a variant of synchronize_irq()
which synchronizes only the hard interrupt handler. Both are
needed to replace the homebrewn thread handling in the mmc/sdhci
code.
- New irq chip callbacks to allow proper support for GPIO based irqs.
The GPIO based interrupts need to request/release GPIO resources
from request/free_irq.
- A few new ARM interrupt chips. No revolutionary new hardware, just
differently wreckaged variations of the scheme.
- Small improvments, cleanups and updates all over the place"
I was hoping that that trainwreck engineering contest was a April Fools'
joke. But no.
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits)
irqchip: sun7i/sun6i: Disable NMI before registering the handler
ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller
ARM: sun7i/sun6i: irqchip: Update the documentation
ARM: sun7i/sun6i: dts: Add NMI irqchip support
ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller
genirq: Export symbol no_action()
arm: omap: Fix typo in ams-delta-fiq.c
m68k: atari: Fix the last kernel_stat.h fallout
irqchip: sun4i: Simplify sun4i_irq_ack
irqchip: sun4i: Use handle_fasteoi_irq for all interrupts
genirq: procfs: Make smp_affinity values go+r
softirq: Add linux/irq.h to make it compile again
m68k: amiga: Add linux/irq.h to make it compile again
irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0
irqchip: sun4i: Fix a comment about mask register initialization
irqchip: sun4i: Fix irq 0 not working
genirq: Add a new IRQCHIP_EOI_THREADED flag
genirq: Document IRQCHIP_ONESHOT_SAFE flag
ARM: sunxi: dt: Convert to the new irq controller compatibles
irqchip: sunxi: Change compatibles
...
Pull timer changes from Thomas Gleixner:
"This assorted collection provides:
- A new timer based timer broadcast feature for systems which do not
provide a global accessible timer device. That allows those
systems to put CPUs into deep idle states where the per cpu timer
device stops.
- A few NOHZ_FULL related improvements to the timer wheel
- The usual updates to timer devices found in ARM SoCs
- Small improvements and updates all over the place"
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits)
tick: Remove code duplication in tick_handle_periodic()
tick: Fix spelling mistake in tick_handle_periodic()
x86: hpet: Use proper destructor for delayed work
workqueue: Provide destroy_delayed_work_on_stack()
clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS
timer: Remove code redundancy while calling get_nohz_timer_target()
hrtimer: Rearrange comments in the order struct members are declared
timer: Use variable head instead of &work_list in __run_timers()
clocksource: exynos_mct: silence a static checker warning
arm: zynq: Add support for cpufreq
arm: zynq: Don't use arm_global_timer with cpufreq
clocksource/cadence_ttc: Overhaul clocksource frequency adjustment
clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled
clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI
sh: Remove Kconfig entries for TMU, CMT and MTU2
ARM: shmobile: Remove CMT, TMU and STI Kconfig entries
clocksource: armada-370-xp: Use atomic access for shared registers
clocksource: orion: Use atomic access for shared registers
clocksource: timer-keystone: Delete unnecessary variable
clocksource: timer-keystone: introduce clocksource driver for Keystone
...
move to support of_dma_request_slave_channel() and dma_request_slave_channel.
we add a xlate() to let dma clients be able to find right dma_chan by generic
"dmas" properties in dts.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Merge "Samsung 3rd DT updates for v3.15" from Kukjin Kim:
- Arndale Octa board updates:
LDO3 and LDO23 enabled for soft-reset
LDO9 enabled for USB operation
MDMA1 disabled to avoid imprecise external abort
Note that this is based on previous tags/samsung-dt-2
* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Keep some essential LDOs enabled for arndale-octa board
ARM: dts: Disable MDMA1 node for arndale-octa board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Samsung 2nd DT updates for v3.15" from Kukjin Kim:
- add DT entry for AHCI SATA and SATA PHY with using generic
PHY framework for exynos5250 and arndale, smdk5250 boards.
- add SSS DT node for exynos5420 and exynos5250
- remove leftover spi0 node for smdk5250 board
- add ADC and thermistor nodes for exynos4412-trats2 board
- move common irq-combiner node for exynos4x12 from exynos4212
and exynos4412
- add ADC, PMU and GPS_ALIVE power domain nodes for exynos4x12
Note that based on previous tags/samsung-dt and tags/exynos-clk
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: enable ahci sata and sata phy for exynos5250
ARM: dts: add dt node for sss module for exynos5250/5420
ARM: dts: Remove leftover spi0 node for smdk5250
ARM: dts: Add ADC and themistor nodes for exynos4412-trats2
ARM: dts: Move common dt data for interrupt combiner controller for exynos4x12
ARM: dts: Add GPS_ALIVE power domain for exynos4x12
ARM: dts: Add PMU dt data to support PMU for exynos4x12
ARM: dts: Add ADC's dt data to read raw data for exynos4x12
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "arm: Xilinx Zynq cleanup patches for v3.15" from Michal Simek:
- Redesign SLCR initialization to enable
driver developing which targets SLCR space
* tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: Add waituart implementation
ARM: zynq: Move of_clk_init from clock driver
ARM: zynq: Introduce zynq_slcr_unlock()
ARM: zynq: Add and use zynq_slcr_read/write() helper functions
ARM: zynq: Make zynq_slcr_base static
ARM: zynq: Map I/O memory on clkc init
ARM: zynq: Hang iomapped slcr address on device_node
ARM: zynq: Split slcr in two parts
ARM: zynq: Move clock_init from slcr to common
arm: dt: zynq: Add fclk-enable property to clkc node
[Arnd: remove SOC_BUS support from pull request]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Keystone DTS fixes for 3.15" from Santosh Shilimkar:
- Few fixes found during NAND ubifs testing
- Fix to build all dtbs together with dtbs
- Last patch is follow up comment from previous pull request
* tag 'keystone-dts-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
Conflicts:
arch/arm/boot/dts/Makefile
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This reverts commit 7e0b4cd062.
The binding changes need to be done differently as well, let's
take them through netdev, and merge the dts changes in a new
patch here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Neither Tegra114 nor Tegra124 allow "low power mode" to be configured
on SDIO1 or SDIO3 drive groups. Remove the attempt to configure that
option from the Dalmore and Venice2 DTs.
The Venice2 DT contained duplicate configurations for most sdmmc1_*
pins. Remove the duplicate pins from one of the nodes, and fix the
configuration since the remaining clk pin is output-only.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The patch adds fimd node with display timings for exynos4210-universal device.
It also makes LCD regulators always on. This allow to re-use panel initialized
by boot loader.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Pull ARM SoC fixes from Olof Johansson:
"Only two patches this time, one to fix ethernet probe order on at91
(better fix with proper device aliasing will be done for 3.15, this is
stop-gap), and one update to MAINTAINERS due to Freescale moving their
repo to kernel.org"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: at91: fix network interface ordering for sama5d36
MAINTAINERS: update IMX kernel git tree
Remove some entries from Dalmore's device tree that attempt to set some
options which aren't supported for the drive_gma pin group.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: tegra: device tree changes for 3.15" from Stephen Warren:
This enables:
- host1x and eDP support on Tegra124.
- LCD panel support for a few Tegra20 devices and Venice2.
- Enables power down, SPI flash, and USB on Venice2.
- Documents which Dalmore revision is supported.
- Adds an I2C bus mux to Cardhu.
Additionally, Tegra124 is converted to use #address-cells=<2> since the
HW suports more than 32-bits of address space, and various cleanups are
included.
* tag 'tegra-for-3.15-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (21 commits)
ARM: dts: tegra: add PCIe interrupt mapping properties
ARM: tegra: use 2 address cells for Tegra124 DT
ARM: tegra: Rename as3722 node to pmic
ARM: tegra: Fix whitespace around '='
ARM: tegra: Enable USB on Venice2
ARM: tegra: Add Tegra124 USB support
ARM: tegra: Enable eDP for Venice2
ARM: tegra: Add Tegra124 eDP support
ARM: tegra: Add Tegra124 host1x support
ARM: tegra: Hook up SDMMC3 power-supply on Venice2
ARM: tegra: Overhaul Venice2 regulators
ARM: tegra: Combine VBUS enable pins into one node
ARM: tegra: Use "disabled" for status property
ARM: tegra: add SPI flash to Venice2 DT
ARM: tegra: enable PCA9546 on Cardhu
ARM: tegra: enable LCD panel on Ventana
ARM: tegra: enable LCD panel on Seaboard
ARM: tegra: add system-power-controller property for PMIC node
ARM: tegra: document which Dalmore revisions are supported
ARM: tegra: Properly sort clocks property
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The UBIFS partition size was incorrectly defined as for 128M NAND,
but on k2hk-evm installed NAND flash size is 512M.
Hence, correct it.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
LDO3 and LDO23 need to be enabled in order for soft-reset to work.
Additionally LDO9 needs to be enabled for USB operations.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
MDMA1 can support both secure and non-secure AXI transactions. When this
is enabled in the kernel for boards that run in secure mode, we get
imprecise external aborts causing the kernel to oops.
Unhandled fault: imprecise external abort (0x1406) at 0x00000000
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007
Suggested-by: Javi Merino <javi.merino@arm.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Tested-by: Javi Merino <javi.merino@arm.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add DT data for OMAP3 N900 board. The board has the following displays:
lcd: LCD panel connected to OMAP's SDI output
tv: analog svideo
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Sebastian Reichel <sre@debian.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP3 IGEPv2 board. The board has the following displays:
dvi: uses TFP410 encoder to convert DPI to DVI
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP3 Beagle-xM board. The board has the following displays:
dvi: uses TFP410 encoder to convert DPI to DVI
tv: analog svideo
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP3 Beagle board. The board has the following displays:
dvi: uses TFP410 encoder to convert DPI to DVI
tv: analog svideo
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP4 SDP board. The board has the following displays:
lcd0: a command mode DSI panel connected to OMAP DSI1 encoder
lcd1: a command mode DSI panel connected to OMAP DSI2 encoder
hdmi: OMAP HDMI output with TPD12S015 ESD/level shifter
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP4 Pandaboard. The board has the following displays:
dvi: uses TFP410 encoder to convert DPI to DVI
hdmi: OMAP HDMI output with TPD12S015 ESD/level shifter
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP4 display subsystem, which contains the following
blocks:
dss - the wrapper/glue for the display modules
dispc - display controller
dsi - MIPI DSI encoder (two independent modules)
rfbi - MIPI DBI encoder
venc - analog TV encoder
hdmi - HDMI encoder
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP3 display subsystem, which contains the following
blocks:
dss - the wrapper/glue for the display modules
dispc - display controller
dsi - MIPI DSI encoder
rfbi - MIPI DBI encoder
venc - analog TV encoder
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Add DT data for OMAP2 display subsystem, which contains the following
blocks:
dss - the wrapper/glue for the display modules
dispc - display controller
rfbi - MIPI DBI encoder
venc - analog TV encoder
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Set 'ti,set-rate-parent' property for clocks in the dpll4_m4 clock
path, which is used for DSS functional clock. This fixes DSS driver's
clock rate configuration, which needs the rate to be propagated properly
to the divider node (dpll4_m4_ck).
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tony Lindgren <tony@atomide.com>
We need to use set-rate-parent for dpll4_m4 clock path, so use the
ti,fixed-factor-clock version which supports set-rate-parent property.
The set-rate-parent flag itself is set in the following patch, this one
just changes the clock driver to ti,fixed-factor-clock without any other
changes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tony Lindgren <tony@atomide.com>
OMAP3630 DPLL4 is different than on OMAP3430, in that it doesn't have
the x2 multiplier for its outputs. This is not currently reflected in
the clock DT data.
Fix the issue by setting the clock multiplier to 1 (instead of 2) for the
DPLL4 output clocks.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
The DSS fclk and iclk handles are named differently on OMAP3430 ES1 than
on later OMAP revisions. The ES1 has handles 'dss1_alwon_fck_3430es1'
and 'dss_ick_3430es1', whereas later revisions have similar names but
ending with 'es2'.
This means we don't have one clock handle to which we could refer to
when defining the DSS clocks.
However, as the namespaces are separate for ES1 and ES2+ OMAPs, we can
just rename the handles to 'dss1_alwon_fck' and 'dss_ick' for both ES1
and ES2+, removing the issue.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Now we have additional two SOC/boards supported, so add
make file rule so that all device tree blobs can be build
for keystone with 'make dtbs'.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The control register range for clktsio interferes with clkaemifspi clock.
And it causes issues for NAND/AEMIF. So fix it.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The domain register range for clkfftc1 has to be 0x0235004c
instead of 0x023504c0.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Merge "STi DT changes part 1 v2" from Srinivas Kandagatla:
Patches : 01-02 are DT patches, adding interrupt support to pin
controller driver, Driver changes are already going via Linus W's
pinctrl tree.
Patches: 03 - 06 are DT patches for reset/softreset controller. Reset
controller driver is Acked by Philipp Zabel.
Patches: 07, 08 are DT patches, adding Ethernet controller support
patches, actual driver changes are already in v3.14-rc4 via Dave Millers
net tree.
Patches: 09, 10 are DT patches for IR driver support, actual IR driver
is already available since v3.12. Reason for the delay is due to
dependency on reset controller driver/headers.
* tag 'DT-for-v3.15-part-1-v2' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: STi: STIH416: Add IR support.
ARM: STi: STIH415: Add IR support.
ARM: STi: STiH416: Add ethernet support.
ARM: STi: STiH415: Add ethernet support.
ARM: STi: STiH416: Add soft reset controller support.
ARM: STi: STiH416: Add reset controller support.
ARM: STi: STiH415: Add soft reset controller support.
ARM: STi: STiH415: Add reset controller support.
ARM: STi: STiH415: Add interrupt support for pin controller
ARM: STi: STiH416: Add interrupt support for pin controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Samsung non-critical fixes for v3.15" from Kukjin Kim:
- fix typo CONFIG_CPU_S3C2443 in Kconfig
- fix G3D regulator on because of entering low power mode
for exynos5250-arndale
- fix CONFIG_USB_EHCI_EXYNOS for exynos_defconfig
- fix initcall of mach-crag6410-module.c
* tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: mach-crag6410-module.c is not modular
ARM: exynos_defconfig: Update EHCI config entry
ARM: dts: Keep G3D regulator always on for exynos5250-arndale
ARM: S3C24XX: Fix typo CONFIG_CPUS_3C2443
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
