MTD NAND partition for file-system should start at offset=0xA00000
Signed-off-by: Pekon Gupta <pekon@ti.com>
[tony@atomide.com: changed to lower case hex like we tend to use]
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Use generic node names
- Fix up some weird formatting and white spaces
- Update copyright info
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
The mpu_clk, main_clk, and dbg_base_clk outputs from the main PLL go through a
pre-divider. Update socfpga.dtsi to represent those dividers for these
clocks.
Re-use the "div-reg" property that was used for the socfpga-gate-clock as this
is the same thing. Also update the documentation.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Add the necessary #reset-cells property to the rst-mgr node and
provide a header-file with all possible resets specified.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The timers and uart can get their clock frequencies using the common clock
driver.
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the
board. This patch adds support for them.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
---
v2: Remove LCD as the driver has not been upstreamed.
Convert all socfpga DT files to the dtc preprocessor include syntax.
This allows to include header files in the devicetrees like other
SoC-types already do.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.16" from Simon
Horman:
* Add r8a7791 (R-Car M2) based Henninger board
* tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: henninger: enable SATA0
ARM: shmobile: henninger: add Ether DT support
ARM: shmobile: henninger: initial device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
Remove use of property ti,vcc-aux-disable-is-sleep, which does not
exist.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CubieTruck has an AMPAK AP6210 WiFi+Bluetooth module. The WiFi
part is a BCM43362 IC connected to MMC3 in the A20 SoC via SDIO.
The IC also takes a power enable signal via GPIO.
The WiFi module supports out-of-band interrupt signaling via GPIO,
but this is not supported in this patch.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Merge "at91: DT for 3.16 #1" from Nicolas Ferre:
3.16: first DT series:
- more support for at91sam9rl and its associated EK board
- some improvements to at91sam9g45 (ADC, TS, PWM leds)
- addition of some missing pieces for describing audio
of SAMA5D3-EK in DT
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: sama5d3: clock for ssc from rk pin
ARM: at91: sama5d3: add the missing property
ARM: at91: sama5d3: correct the sound compatible string
ARM: at91: sama5d3: disable sound by default
ARM: at91: sama5d3: add DMA property for SSC devices
ARM: at91/dt: at91sam9m10g45ek PWM leds polarity is inversed
ARM: at91/dt: at91sam9m10g45ek: add ADC and touchscreen support
ARM: at91/dt: sam9g45: improve ADC/touchscreen support
ARM: at91/dt: add peripherals to the at91sam9rlek board
ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Renesas ARM Based SoC Updates for v3.16" from Simon Horman:
SH Mobile shared SoC code
* Add shared shmobile_init_delay()
r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs (R-Car Gen2 shared code)
* Cache Mode Monitor Register Value
r8a7791 (R-Car M2) SoC
Check r8a7791 MD21 at SMP boot
r8a7790 (R-Car H2) SoC
* Make use of r8a7790_add_standard_devices()
* Update r8a7791 CPU freq to 1500MHz
r8a7778 (R-Car M1) SoC
* Move "select RENESAS_INTC_IRQPIN" under SoC
emev2 (Emma Mobale EV2) SoC
* Remove legacy EMEV2 SoC support
* tag 'renesas-soc-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7778/bockw: Move "select RENESAS_INTC_IRQPIN" under SoC
ARM: shmobile: Check r8a7791 MD21 at SMP boot
ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value
ARM: shmobile: Make use of r8a7790_add_standard_devices()
ARM: shmobile: Remove EMEV2 header file
ARM: shmobile: Remove legacy EMEV2 SoC support
ARM: shmobile: Add shared shmobile_init_delay()
ARM: shmobile: Update r8a7791 CPU freq to 1500MHz in C
Signed-off-by: Olof Johansson <olof@lixom.net>
AM4372 has two clk domains 100f and 200s. Provide register mapping,
interrupt information and compatibility flags associated with it.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
We have currently marked the DRA7 L3 as being compatible with
omap4-l3-noc This is not true considering the differences in data
involved.
Now that we have proper support for ti,dra7-l3-noc, add the clock
modules clk1 and clk3 (clk2 submodule will be handled by the driver)
and switch compatibility flag to use the proper data.
Signed-off-by: Rajendra Nayak <ranayak@ti.com>
[nm@ti.com: map up full address range]
Signed-off-by: Nishanth Menon <nm@ti.com>
Add CPSW fck and CPTS clock and clock names for AM4372
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
From Jason Cooper:
mvebu DT fixes for v3.15
- mvebu
- fix NOR bus width on Armada XP boards
- use qsgmii on Armada XP GP board
- add i2c bus freq for Armada 370 DB board
- add SATA interface for Armada 375 DB
- kirkwood
- fix double probe of audio codec for T5325
* tag 'mvebu-dt-fixes-3.15' of git://git.infradead.org/linux-mvebu:
ARM: Kirkwood: T5325: Fix double probe of Codec
ARM: mvebu: enable the SATA interface on Armada 375 DB
ARM: mvebu: specify I2C bus frequency on Armada 370 DB
ARM: mvebu: use qsgmii phy-mode for Armada XP GP interfaces
ARM: mvebu: fix NOR bus-width in Armada XP OpenBlocks AX3 Device Tree
ARM: mvebu: fix NOR bus-width in Armada XP DB Device Tree
ARM: mvebu: fix NOR bus-width in Armada XP GP Device Tree
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge fixes from Tony Lindgren:
Mostly fixes for occasional memory corruption caused by bad
timings for smc911x LAN9220 (and potentially LAN9221) devices
that were noted on a cm-t3730 system. Also fix THUMB mode
for SMP, and mailbox related warnings when booted with device
tree.
* tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: AM3517: Disable absent IPs inherited from OMAP3
ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox
ARM: dts: OMAP5: Add mailbox dt node to fix boot warning
ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU
ARM: dts: am437x-gp-evm: Do not reset gpio5
ARM: dts: omap3-igep0020: use SMSC9221 timings
ARM: dts: Fix GPMC timings for LAN9220
ARM: dts: Fix GPMC Ethernet timings for omap cm-t sbc-t boards for device tree
ARM: dts: Fix bad OTG muxing for cm-t boards
Signed-off-by: Olof Johansson <olof@lixom.net>
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the 4 mmc controllers found on A31 SoCs to
arch/arm/boot/dts/sun6i-a31.dtsi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested on a subset of these boards, for the others boards the settings match
the ones of the tested boards according to the original firmware fex files.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc0 is the only controller actually being used on boards, so limit the
pin-muxing options to that.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Most boards use the default UART0/1 pinctrl setting without RTS/CTS.
Add the pinctrl setting to the toplevel SoC UART nodes and put a note
in front of the corresponding pinctrl node to overwrite the setting
on board level. Currently, both boards using a different UART pinctrl
setting (Openblocks A6, A7) already overwrite the pinctrl node.
While at it, also fix up some status = "ok" to "okay" and again
whitespace issues on mplcec4 uart nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-10-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
