Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim:
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
* tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm
ARM: EXYNOS: do not allow cpuidle registration for exynos5420
cpuidle: big.LITTLE: init driver for exynos5420
cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config
ARM: EXYNOS: add generic function to calculate cpu number
cpuidle: big.LITTLE: add of_device_id structure
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Samsung cleanup for v3.17" from Kukjin Kim:
Most of them are for exynos SoCs, remove useless codes and update for
PMU consolidation.
- remove unnecessary header file in mach-exynos/pmu.c
- remove unused code in mach-exynos/common.h
- remove mach-exynos/regs-pmu.h dependency from PD
- remove file path from comment section in mach-exynos
- move SYSREG definitions into mach-exynos/regs-sys.h
- add mapping PMU base address via DT for PMU cleanup
- use staic in mach-exynos/common.h
- update Samsung UART config options for low-level debug
* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add support for mapping PMU base address via DT
ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
ARM: EXYNOS: Remove file path from comment section
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
ARM: EXYNOS: Make exynos machine_ops as static
ARM: EXYNOS: Remove unused code in common.h
ARM: debug: Update Samsung UART config options
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: tegra: device tree changes for 3.17" from Thierry Reding:
- New board support:
* Apalis T30
- HDA support for Tegra124 and Venice2
- Display on Medcom Wide and Roth
- GK20A support on Tegra124
- XUSB pad controller for Tegra124 and Jetson TK1
- Various cleanups
This pulls in the for-3.17/fuse-move, for-3.17/dt-cros-ec-kbd and
for-3.17/xusb-padctl branches to resolve dependencies.
Note that the Apalis T30 support has a runtime dependency on the
for-3.17/pcie-regulators branch, so they should preferably be applied
in that order. I didn't merge that branch into this because Apalis T30
support is new, therefore can't regress, and because the dependency
exists only at runtime.
* tag 'tegra-for-3.17-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
ARM: tegra: roth: add display DT node
ARM: tegra: Fix typoed ams,ext-control properties
ARM: tegra: jetson-tk1: Add XUSB pad controller
ARM: tegra: tegra124: Add XUSB pad controller
ARM: tegra: add GK20A GPU to Tegra124 DT
ARM: tegra: of: add GK20A device tree binding
ARM: tegra: roth: enable input on mmc clock pins
ARM: tegra: roth: fix unsupported pinmux properties
ARM: tegra: Migrate Apalis T30 PCIe power supply scheme
ARM: tegra: tamonten: add the display to the Medcom Wide
ARM: tegra: tamonten: add the base board regulators
ARM: tegra: initial support for apalis t30
ARM: tegra: jetson-tk1: mark eMMC as non-removable
ARM: tegra: venice2 - Enable HDA
ARM: tegra: Add Tegra124 HDA support
ARM: tegra: Add the EC i2c tunnel to tegra124-venice2
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: tegra: Add XUSB pad controller support" from Thierry Reding:
Adds device tree bindings and a driver for the XUSB pad controller found
on Tegra114 and later. This is a prerequisites for PCIe, SATA and XUSB
drivers which are all currently being reviewed or pending for merge.
This is a separate branch in case it needs to be pulled into the pinctrl
tree to resolve conflicts.
* tag 'tegra-for-3.17-xusb-padctl' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
pinctrl: Add NVIDIA Tegra XUSB pad controller support
of: Add NVIDIA Tegra XUSB pad controller binding
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: tegra: rework PCIe regulators" from Thierry Reding:
This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.
I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.
* tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove legacy PCIe power supply properties
PCI: tegra: Remove deprecated power supply properties
PCI: tegra: Implement accurate power supply scheme
ARM: tegra: Add new PCIe regulator properties
PCI: tegra: Overhaul regulator usage
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: tegra: move fuse code out of arch/arm" from Thierry Reding:
This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.
Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.
Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.
* tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Xilinx Zynq changes for v3.17" from Michal Simek:
arm: Xilinx Zynq dt patches for v3.17
- Document and use new cadence serial binding
* tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: DT: Migrate UART to Cadence binding
tty: cadence: Document DT binding
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: imx: device tree updates for 3.17" from Shawn Guo:
The i.MX device tree updates for 3.17:
- Add device tree sources and pin function header for i.MX6SX SoC
- Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio
and GPIO key enabled
- New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos
imx6dl boards, Rex Pro and Basic, Ka-Ro TX6
- Restructure imx6qdl-wandboard.dtsi for new rev C1 board
- Split M28EVK and M53EVK into SoM and EVK parts
- A few correction around SDMA, SSI and SATA device nodes
- Add eSATA support for Cubox-i board
- Updates on edmqmx6 to enable PCIe, I2C and CAN
- Use DT macro for clock ID for imx27 and imx6qdl
- Add FlexCAN support for VF610 SoC
* tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (125 commits)
ARM: dts: vf610: add FlexCAN node
ARM: dts: add initial Rex Basic board support
ARM: dts: add initial Rex Pro board support
ARM: dts: mx5: Split M53EVK into SoM and EVK parts
ARM: dts: imx6: RIoTboard explicitly define pad settings
ARM: dts: vf610: fix length of eshdc1 register property
ARM: dts: Restructure imx6qdl-wandboard.dtsi for new rev C1 board.
ARM: dts: imx53: correct clock-names of SATA node
ARM: imx6: Align ssi nodes between mx6 variants
ARM: i.MX27 clk: dts: Use clock defines in DTS files
ARM: dts: imx: correct sdma compatbile for imx6sl and imx6sx
ARM: dts: imx6sx-sdb: Add audio support
ARM: dts: imx6sx: Pass the fsl,fifo-depth property
ARM: dts: imx6sx: Fix sdma node
ARM: dts: imx6: edmqmx6: Add can bus
ARM: dts: imx6: edmqmx6: Add two other i2c buses
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx25-pdk: Add USB OTG support
ARM: dts: i.MX53: add aipstz nodes
ARM: dts: mxs: Split M28EVK into SoM and EVK parts
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: imx: SoC changes for 3.17" from Shawn Guo:
The i.MX SoC changes for 3.17:
- Add devicetree support for i.MX1 and i.MX21 clock driver
- Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets
- Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in
device tree boot
- Remove i.MX1 camera support
- Remove i.MX27 IP Camera and Lite-Kit board support
- Add suspend and cpuidle support for i.mx6sx
- Clean up unused clk_register_clkdev() lookups
- Update imx-weim bus driver to support populating devices on a simple
bus
- Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs
- Make i.MX51 a DT only platform and clean up the non-DT support code
- Support disabling supervisor protect via DT
- Random defconfig updates
* tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
ARM: imx: clk-vf610: fix FlexCAN clock gating
ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets
ARM: i.MX53: globally disable supervisor protect
ARM: i.MX: allow disabling supervisor protect via DT
ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gate
ARM: i.MX27 clk: Remove unused definitions
ARM: i.MX27 clk: Introduce DT include for clock provider
ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board support
ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27
ARM: i.MX: Remove i.MX1 camera support
ARM: imx: use PTR_ERR_OR_ZERO
bus: imx-weim: populate devices on a simple bus
ARM: imx: build cpu_is_imx6sl function conditionally
ARM: imx: imx6sx uses imx6q cpuidle code
ARM: imx: drop PL310 errata 588369 and 727915
ARM: imx_v6_v7_defconfig: add FSL_EDMA and PRINTK_TIME
ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocks
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: imx: mark .dt_compat as const
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull RCU fixes from Thomas Gleixner:
"Two RCU patches:
- Address a serious performance regression on open/close caused by
commit ac1bea8578 ("Make cond_resched() report RCU quiescent
states")
- Export RCU debug functions. Not a regression, but enablement to
address a serious recursion bug in the sl*b allocators in 3.17"
* 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
rcu: Reduce overhead of cond_resched() checks for RCU
rcu: Export debug_init_rcu_head() and and debug_init_rcu_head()
Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:
First set of .dts changes for omaps for v3.17 merge window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (43 commits)
ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
ARM: dts: dra7: Add dt data for PCIe controller
ARM: dts: dra7: Add dt data for PCIe PHY
ARM: dts: dra7: Add dt data for PCIe PHY control module
ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
ARM: omap2plus_defconfig: enable TPS65218 configs
ARM: dts: AM437x: Add TPS65218 device tree nodes
ARM: dts: AM437x: Fix i2c nodes indentation
ARM: dts: AM43x: Add TPS65218 device tree nodes
ARM: dts: Add devicetree for Gumstix Pepper board
ARM: dts: dra7: add crossbar device binding
ARM: dts: dra7: add routable-irqs property for gic node
ARM: OMAP24xx: clock: remove legacy clock data
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds device tree binding documentation for the SATA
controller found on NVIDIA Tegra SoCs.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Add new power supply properties for input current, charge termination
current, min and max temperature
POWER_SUPPLY_PROP_TEMP_MIN - minimum operatable temperature
POWER_SUPPLY_PROP_TEMP_MAX - maximum operatable temperature
POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT - input current limit programmed
by charger. Indicates the input current for a charging source.
POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT - Charge termination current used
to detect the end of charge condition
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Add support for the Samsung's S5PV210 SoC to the Exynos USB 2.0 PHY driver.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
[k.debski@samsung.com: cleanup and commit description]
[k.debski@samsung.com: make changes accordingly to the mailing list
comments]
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a driver for clock controller being a part of Audio
Subsystem present on S5PV210 and compatible SoCs. It is used to provide
clocks for other IP blocks of this subsystem.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 and compatible SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[t.figa: Added support for other SoC variants and clock output. Fixed
remaining minor issues.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
function_trace_stop is no longer used to disable function tracing.
This means that archs are no longer limited if it does not support
checking this variable in the mcount trampoline.
No need to use the list_func for archs that do not support this
obsolete method.
Acked-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
This patch adds a driver for Microchips CAP1106, an I2C driven, 6-channel
capacitive touch sensor.
For now, only the capacitive buttons are supported, and no specific
settings that can be tweaked for individual channels, except for the
device-wide sensitivity gain. The defaults seem to work just fine out of
the box, so I'll leave configurable parameters for someone who's in need
of them and who can actually measure the impact. All registers are
prepared, however. Many of them are just not used for now.
The implementation does not make any attempt to be compatible to platform
data driven boards, but fully depends on CONFIG_OF.
Power management functions are also left for volounteers with the ability
to actually test them.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
These power supply properties are no longer needed since the binding now
contains the full set properties to accurately describe the power supply
inputs of the Tegra PCIe block.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use clock defines in order to make devicetrees more human readable.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX21 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of using enum for clock ID, let's switch imx6qdl clock driver to
use macro. In this case, device tree can reuse these macros to improve
readability.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add tunable RX interrupt trigger I/F of FIFO buffers.
Serial devices are used as not only message communication devices but control
or sending communication devices. For the latter uses, normally small data
will be exchanged, so user applications want to receive data unit as soon as
possible for real-time tendency. If we have a sensor which sends a 1 byte data
each time and must control a device based on the sensor feedback, the RX
interrupt should be triggered for each data.
According to HW specification of serial UART devices, RX interrupt trigger
can be changed, but the trigger is hard-coded. For example, RX interrupt trigger
in 16550A can be set to 1, 4, 8, or 14 bytes for HW, but current driver sets
the trigger to only 8bytes.
This patch makes some devices change RX interrupt trigger from userland.
<How to use>
- Read current setting
# cat /sys/class/tty/ttyS0/rx_trig_bytes
8
- Write user setting
# echo 1 > /sys/class/tty/ttyS0/rx_trig_bytes
# cat /sys/class/tty/ttyS0/rx_trig_bytes
1
<Support uart devices>
- 16550A and Tegra (1, 4, 8, or 14 bytes)
- 16650V2 (8, 16, 24, or 28 bytes)
- 16654 (8, 16, 56, or 60 bytes)
- 16750 (1, 16, 32, or 56 bytes)
<Change log>
Changes in V9:
- Use attr_group instead of dev_spec_attr_group of uart_port structure
Changes in V8:
- Divide this patch from V7's patch based on Greg's comment
Changes in V7:
- Add Documentation
- Change I/F name from rx_int_trig to rx_trig_bytes because the name
rx_int_trig is hard to understand how users specify the value
Changes in V6:
- Move FCR_RX_TRIG_* definition in 8250.h to include/uapi/linux/serial_reg.h,
rename those to UART_FCR_R_TRIG_*, and use UART_FCR_TRIGGER_MASK to
UART_FCR_R_TRIG_BITS()
- Change following function names:
convert_fcr2val() => fcr_get_rxtrig_bytes()
convert_val2rxtrig() => bytes_to_fcr_rxtrig()
- Fix typo in serial8250_do_set_termios()
- Delete the verbose error message pr_info() in bytes_to_fcr_rxtrig()
- Rename *rx_int_trig/rx_trig* to *rxtrig* for several functions or variables
(but UI remains rx_int_trig)
- Change the meaningless variable name 'val' to 'bytes' following functions:
fcr_get_rxtrig_bytes(), bytes_to_fcr_rxtrig(), do_set_rxtrig(),
do_serial8250_set_rxtrig(), and serial8250_set_attr_rxtrig()
- Use up->fcr in order to get rxtrig_bytes instead of rx_trig_raw in
fcr_get_rxtrig_bytes()
- Use conf_type->rxtrig_bytes[0] instead of switch statement for support check
in register_dev_spec_attr_grp()
- Delete the checking whether a user changed FCR or not when minimum buffer
is needed in serial8250_do_set_termios()
Changes in V5.1:
- Fix FCR_RX_TRIG_MAX_STATE definition
Changes in V5:
- Support Tegra, 16650V2, 16654, and 16750
- Store default FCR value to up->fcr when the port is first created
- Add rx_trig_byte[] in uart_config[] for each device and use rx_trig_byte[]
in convert_fcr2val() and convert_val2rxtrig()
Changes in V4:
- Introduce fifo_bug flag in uart_8250_port structure
This is enabled only when parity is enabled and UART_BUG_PARITY is enabled
for up->bugs. If this flag is enabled, user cannot set RX trigger.
- Return -EOPNOTSUPP when it does not support device at convert_fcr2val() and
at convert_val2rxtrig()
- Set the nearest lower RX trigger when users input a meaningless value at
convert_val2rxtrig()
- Check whether p->fcr is existing at serial8250_clear_and_reinit_fifos()
- Set fcr = up->fcr in the begging of serial8250_do_set_termios()
Changes in V3:
- Change I/F from ioctl(2) to sysfs(rx_int_trig)
Changed in V2:
- Use _IOW for TIOCSFIFORTRIG definition
- Pass the interrupt trigger value itself
Signed-off-by: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
UART modules on some SoCs only differ in the fifosize of each
UART channel. Its useless to duplicate the drv_data structure
or create a compatible name for such a change.
We can get fifosize via the device tree nodes (not mandating it).
Also updates the documentation.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pm-sleep:
PM / sleep: fix freeze_ops NULL pointer dereferences
PM / sleep: Fix request_firmware() error at resume
* pm-cpufreq:
cpufreq: make table sentinel macros unsigned to match use
cpufreq: move policy kobj to policy->cpu at resume
cpufreq: cpu0: OPPs can be populated at runtime
cpufreq: kirkwood: Reinstate cpufreq driver for ARCH_KIRKWOOD
cpufreq: imx6q: Select PM_OPP
cpufreq: sa1110: set memory type for h3600
OTG3 and EH Compliance Plan 1.0 talks about Super Speed OTG Verification
system (SS-OVS) which consists of an excersizer and analyzer.
USB Compliance Suite from Lecroy or Ellisys can act as such SS-OVS for
Link Layer Validation (LVS).
Some modifications are needed for an embedded Linux USB host to pass all
these tests. Most of these tests require just Link to be in U0. They do
not work with default Linux USB stack since, default stack does port
reset and then starts sending setup packet, which is not expected by
Link Layer Validation (LVS) device of Lecroy Compliance Suit. Then,
There are many Link Layer Tests which need host to generate specific
traffic.
This patch supports specific traffic generation cases. As of now all the
host Lecroy Link Layer-USBIF tests (except TD7.26) passes
with this patch for single run using Lecroy USB Compliance Suite
Version 1.98 Build 239 and Lecroy USB Protocol Analyzer version 4.80
Build 1603. Therefore patch seems to be a good candidate for inclusion.
Further modification can be done on top of it.
lvstest driver will not bind to any device by default. It can bind
manually to a super speed USB host controller root hub. Therefore, regular
hub driver must be unbound before this driver is bound. For example, if
2-0:1.0 is the xhci root hub, then execute following to unbind hub driver.
echo 2-0:1.0 > /sys/bus/usb/drivers/hub/unbind
Then write Linux Foundation's vendor ID which is used by root hubs and
SS root hub's device ID into new_id file. Writing IDs into new_id file
will also bind the lvs driver with any available SS root hub interfaces.
echo "1D6B 3" > /sys/bus/usb/drivers/lvs/new_id
Now connect LVS device with root hub port.
Test case specific traffic can be generated as follows whenever needed:
1. To issue "Get Device descriptor" command for TD.7.06:
echo > /sys/bus/usb/devices/2-0\:1.0/get_dev_desc
2. To set U1 timeout to 127 for TD.7.18
echo 127 > /sys/bus/usb/devices/2-0\:1.0/u1_timeout
3. To set U2 timeout to 0 for TD.7.18
echo 0 > /sys/bus/usb/devices/2-0\:1.0/u2_timeout
4. To issue "Hot Reset" for TD.7.29
echo > /sys/bus/usb/devices/2-0\:1.0/hot_reset
5. To issue "U3 Entry" for TD.7.35
echo > /sys/bus/usb/devices/2-0\:1.0/u3_entry
6. To issue "U3 Exit" for TD.7.36
echo > /sys/bus/usb/devices/2-0\:1.0/u3_exit
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Obsolete; either use 'max_lun' if the host supports only a
limited number of LUNs or BLIST_NOLUN if the target has
problems addressing more than one LUN.
Signed-off-by: Hannes Reinecke <hare@suse.de>
Reviewed-by: Ewan Milne <emilne@redhat.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
The text referred to videodev.h when videodev2.h was meant. Fixed.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The v4l2_event union has a new src_change field, but that was never
added to the VIDIOC_DQEVENT documentation of that union. Fixed.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
There shouldn't be any spaces after <constant> or before </constant>.
This leads to ugly results like: 'image size set by VIDIOC_S_FMT .'
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Samsung SPI driver now uses the generic SPI "cs-gpios"
binding so update the documentation accordingly.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
[javier.martinez@collabora.co.uk: split changes and improve commit message]
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Some chips implement banked register ranges. This allows implementing
more registers than the limited 8-bit address space originally allows.
In order to access a register on these chips, you must first select
the proper bank. Add support for this mechanism to the i2c-stub driver
so that such chips can be emulated. All the bank settings are passed
as module parameters.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Gadget function files have been moved to a "function" subdirectory.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
SMBus block commands are different to I2C block commands since
the returned data is not normally accessible with byte or word
commands on other command offsets. Add linked list of 'block'
commands to support those commands.
Access mechanism is quite simple: Block commands must be written
before they can be read. Subsequent writes can be partial. Block
read commands always return the number of bytes associated with
the longest previous write.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Support the TI TAS2552 Class D amplifier.
The TAS2552 is a high efficiency Class-D audio
power amplifier with advanced battery current
management and an integrated Class-G boost
The device constantly measures the
current and voltage across the load and provides a
digital stream of this information.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
When set, the new V4L2_PIX_FMT_FLAG_PREMUL_ALPHA flag indicates that the
pixel values are premultiplied by the alpha channel value.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The v4l2_pix_format structure has no reserved field. It is embedded in
the v4l2_framebuffer structure which has no reserved fields either, and
in the v4l2_format structure which has reserved fields that were not
previously required to be zeroed out by applications.
To allow extending v4l2_pix_format, inline it in the v4l2_framebuffer
structure, and use the priv field as a magic value to indicate that the
application has set all v4l2_pix_format extended fields and zeroed all
reserved fields following the v4l2_pix_format field in the v4l2_format
structure.
The availability of this API extension is reported to userspace through
the new V4L2_CAP_EXT_PIX_FORMAT capability flag. Just checking that the
priv field is still set to the magic value at [GS]_FMT return wouldn't
be enough, as older kernels don't zero the priv field on return.
To simplify the internal API towards drivers zero the extended fields
and set the priv field to the magic value for applications not aware of
the extensions.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
